579 lines
16 KiB
Markdown
579 lines
16 KiB
Markdown
;; Predicate definitions for HP PA-RISC.
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;; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3. If not see
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;; <http://www.gnu.org/licenses/>.
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;; Return nonzero only if OP is a register of mode MODE, or
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;; CONST0_RTX.
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(define_predicate "reg_or_0_operand"
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(match_code "subreg,reg,const_int,const_double")
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{
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return (op == CONST0_RTX (mode) || register_operand (op, mode));
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})
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;; Return nonzero if OP is suitable for use in a call to a named
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;; function.
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;;
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;; For 2.5 try to eliminate either call_operand_address or
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;; function_label_operand, they perform very similar functions.
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(define_predicate "call_operand_address"
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(match_code "label_ref,symbol_ref,const_int,const_double,const,high")
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{
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return (GET_MODE (op) == word_mode
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&& CONSTANT_P (op) && ! TARGET_PORTABLE_RUNTIME);
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})
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;; Return 1 iff OP is an indexed memory operand.
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(define_predicate "indexed_memory_operand"
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(match_code "subreg,mem")
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{
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if (GET_MODE (op) != mode)
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return 0;
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/* Before reload, a (SUBREG (MEM...)) forces reloading into a register. */
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if (reload_completed && GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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if (GET_CODE (op) != MEM || symbolic_memory_operand (op, mode))
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return 0;
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op = XEXP (op, 0);
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return (memory_address_p (mode, op) && IS_INDEX_ADDR_P (op));
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})
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;; Return 1 iff OP is a symbolic operand.
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;; Note: an inline copy of this code is present in pa_secondary_reload.
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(define_predicate "symbolic_operand"
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(match_code "symbol_ref,label_ref,const")
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{
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switch (GET_CODE (op))
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{
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case SYMBOL_REF:
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return !SYMBOL_REF_TLS_MODEL (op);
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case LABEL_REF:
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return 1;
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case CONST:
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op = XEXP (op, 0);
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return (GET_CODE (op) == PLUS
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&& ((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
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&& !SYMBOL_REF_TLS_MODEL (XEXP (op, 0)))
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|| GET_CODE (XEXP (op, 0)) == LABEL_REF)
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&& GET_CODE (XEXP (op, 1)) == CONST_INT);
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default:
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return 0;
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}
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})
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;; Return truth value of statement that OP is a symbolic memory
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;; operand of mode MODE.
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(define_predicate "symbolic_memory_operand"
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(match_code "subreg,mem")
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{
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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if (GET_CODE (op) != MEM)
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return 0;
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op = XEXP (op, 0);
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return ((GET_CODE (op) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (op))
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|| GET_CODE (op) == CONST || GET_CODE (op) == HIGH
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|| GET_CODE (op) == LABEL_REF);
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})
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;; Return true if OP is a symbolic operand for the TLS Global Dynamic model.
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(define_predicate "tgd_symbolic_operand"
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(and (match_code "symbol_ref")
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(match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_GLOBAL_DYNAMIC")))
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;; Return true if OP is a symbolic operand for the TLS Local Dynamic model.
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(define_predicate "tld_symbolic_operand"
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(and (match_code "symbol_ref")
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(match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC")))
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;; Return true if OP is a symbolic operand for the TLS Initial Exec model.
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(define_predicate "tie_symbolic_operand"
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(and (match_code "symbol_ref")
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(match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC")))
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;; Return true if OP is a symbolic operand for the TLS Local Exec model.
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(define_predicate "tle_symbolic_operand"
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(and (match_code "symbol_ref")
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(match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC")))
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;; Return 1 if the operand is a register operand or a non-symbolic
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;; memory operand after reload. This predicate is used for branch
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;; patterns that internally handle register reloading. We need to
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;; accept non-symbolic memory operands after reload to ensure that the
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;; pattern is still valid if reload didn't find a hard register for
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;; the operand.
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(define_predicate "reg_before_reload_operand"
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(match_code "reg,mem")
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{
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/* Don't accept a SUBREG since it will need a reload. */
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if (GET_CODE (op) == SUBREG)
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return 0;
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if (register_operand (op, mode))
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return 1;
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if (reload_completed
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&& memory_operand (op, mode)
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&& !symbolic_memory_operand (op, mode))
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return 1;
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return 0;
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})
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;; Return 1 if the operand is either a register, zero, or a memory
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;; operand that is not symbolic.
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(define_predicate "reg_or_0_or_nonsymb_mem_operand"
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(match_code "subreg,reg,mem,const_int,const_double")
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{
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if (register_operand (op, mode))
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return 1;
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if (op == CONST0_RTX (mode))
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return 1;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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if (GET_CODE (op) != MEM)
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return 0;
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/* Until problems with management of the REG_POINTER flag are resolved,
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we need to delay creating move insns with unscaled indexed addresses
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until CSE is not expected. */
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if (!TARGET_NO_SPACE_REGS
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&& !cse_not_expected
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&& GET_CODE (XEXP (op, 0)) == PLUS
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&& REG_P (XEXP (XEXP (op, 0), 0))
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&& REG_P (XEXP (XEXP (op, 0), 1)))
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return 0;
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return (!symbolic_memory_operand (op, mode)
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&& memory_address_p (mode, XEXP (op, 0)));
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})
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;; Accept anything that can be used as a destination operand for a
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;; move instruction. We don't accept indexed memory operands since
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;; they are supported only for floating point stores.
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(define_predicate "move_dest_operand"
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(match_code "subreg,reg,mem")
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{
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if (register_operand (op, mode))
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return 1;
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if (GET_MODE (op) != mode)
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return 0;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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if (GET_CODE (op) != MEM || symbolic_memory_operand (op, mode))
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return 0;
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op = XEXP (op, 0);
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return (memory_address_p (mode, op)
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&& !IS_INDEX_ADDR_P (op)
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&& !IS_LO_SUM_DLT_ADDR_P (op));
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})
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;; Accept anything that can be used as a source operand for a move
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;; instruction.
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(define_predicate "move_src_operand"
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(match_code "subreg,reg,const_int,const_double,mem")
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{
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if (register_operand (op, mode))
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return 1;
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if (op == CONST0_RTX (mode))
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return 1;
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if (GET_CODE (op) == CONST_INT)
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return cint_ok_for_move (INTVAL (op));
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if (GET_MODE (op) != mode)
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return 0;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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if (GET_CODE (op) != MEM)
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return 0;
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/* Until problems with management of the REG_POINTER flag are resolved,
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we need to delay creating move insns with unscaled indexed addresses
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until CSE is not expected. */
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if (!TARGET_NO_SPACE_REGS
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&& !cse_not_expected
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&& GET_CODE (XEXP (op, 0)) == PLUS
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&& REG_P (XEXP (XEXP (op, 0), 0))
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&& REG_P (XEXP (XEXP (op, 0), 1)))
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return 0;
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return memory_address_p (mode, XEXP (op, 0));
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})
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;; Accept anything that can be used as the source operand for a
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;; prefetch instruction with a cache-control completer.
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(define_predicate "prefetch_cc_operand"
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(match_code "mem")
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{
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if (GET_CODE (op) != MEM)
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return 0;
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op = XEXP (op, 0);
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/* We must reject virtual registers as we don't allow REG+D. */
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if (op == virtual_incoming_args_rtx
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|| op == virtual_stack_vars_rtx
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|| op == virtual_stack_dynamic_rtx
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|| op == virtual_outgoing_args_rtx
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|| op == virtual_cfa_rtx)
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return 0;
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if (!REG_P (op) && !IS_INDEX_ADDR_P (op))
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return 0;
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/* Until problems with management of the REG_POINTER flag are resolved,
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we need to delay creating prefetch insns with unscaled indexed addresses
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until CSE is not expected. */
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if (!TARGET_NO_SPACE_REGS
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&& !cse_not_expected
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&& GET_CODE (op) == PLUS
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&& REG_P (XEXP (op, 0)))
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return 0;
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return memory_address_p (mode, op);
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})
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;; Accept anything that can be used as the source operand for a
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;; prefetch instruction with no cache-control completer.
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(define_predicate "prefetch_nocc_operand"
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(match_code "mem")
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{
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if (GET_CODE (op) != MEM)
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return 0;
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op = XEXP (op, 0);
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/* Until problems with management of the REG_POINTER flag are resolved,
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we need to delay creating prefetch insns with unscaled indexed addresses
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until CSE is not expected. */
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if (!TARGET_NO_SPACE_REGS
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&& !cse_not_expected
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&& GET_CODE (op) == PLUS
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&& REG_P (XEXP (op, 0))
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&& REG_P (XEXP (op, 1)))
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return 0;
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return memory_address_p (mode, op);
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})
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;; Accept REG and any CONST_INT that can be moved in one instruction
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;; into a general register.
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(define_predicate "reg_or_cint_move_operand"
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(match_code "subreg,reg,const_int")
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{
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if (register_operand (op, mode))
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return 1;
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return (GET_CODE (op) == CONST_INT && cint_ok_for_move (INTVAL (op)));
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})
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;; TODO: Add a comment here.
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(define_predicate "pic_label_operand"
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(match_code "label_ref,const")
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{
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if (!flag_pic)
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return 0;
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switch (GET_CODE (op))
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{
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case LABEL_REF:
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return 1;
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case CONST:
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op = XEXP (op, 0);
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return (GET_CODE (XEXP (op, 0)) == LABEL_REF
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&& GET_CODE (XEXP (op, 1)) == CONST_INT);
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default:
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return 0;
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}
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})
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;; TODO: Add a comment here.
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(define_predicate "fp_reg_operand"
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(match_code "reg")
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{
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return reg_renumber && FP_REG_P (op);
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})
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;; Return truth value of whether OP can be used as an operand in a
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;; three operand arithmetic insn that accepts registers of mode MODE
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;; or 14-bit signed integers.
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(define_predicate "arith_operand"
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(match_code "subreg,reg,const_int")
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{
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return (register_operand (op, mode)
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|| (GET_CODE (op) == CONST_INT && INT_14_BITS (op)));
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})
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;; Return truth value of whether OP can be used as an operand in a
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;; three operand arithmetic insn that accepts registers of mode MODE
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;; or 11-bit signed integers.
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(define_predicate "arith11_operand"
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(match_code "subreg,reg,const_int")
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{
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return (register_operand (op, mode)
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|| (GET_CODE (op) == CONST_INT && INT_11_BITS (op)));
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})
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;; A constant integer suitable for use in a PRE_MODIFY memory
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;; reference.
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(define_predicate "pre_cint_operand"
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(match_code "const_int")
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{
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return (GET_CODE (op) == CONST_INT
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&& INTVAL (op) >= -0x2000 && INTVAL (op) < 0x10);
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})
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;; A constant integer suitable for use in a POST_MODIFY memory
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;; reference.
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(define_predicate "post_cint_operand"
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(match_code "const_int")
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{
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return (GET_CODE (op) == CONST_INT
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&& INTVAL (op) < 0x2000 && INTVAL (op) >= -0x10);
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})
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;; TODO: Add a comment here.
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(define_predicate "arith_double_operand"
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(match_code "subreg,reg,const_double")
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{
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return (register_operand (op, mode)
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|| (GET_CODE (op) == CONST_DOUBLE
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&& GET_MODE (op) == mode
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&& VAL_14_BITS_P (CONST_DOUBLE_LOW (op))
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&& ((CONST_DOUBLE_HIGH (op) >= 0)
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== ((CONST_DOUBLE_LOW (op) & 0x1000) == 0))));
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})
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;; Return truth value of whether OP is an integer which fits the range
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;; constraining immediate operands in three-address insns, or is an
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;; integer register.
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(define_predicate "ireg_or_int5_operand"
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(match_code "const_int,reg")
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{
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return ((GET_CODE (op) == CONST_INT && INT_5_BITS (op))
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|| (GET_CODE (op) == REG && REGNO (op) > 0 && REGNO (op) < 32));
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})
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;; Return truth value of whether OP is an integer which fits the range
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;; constraining immediate operands in three-address insns.
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(define_predicate "int5_operand"
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(match_code "const_int")
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{
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return (GET_CODE (op) == CONST_INT && INT_5_BITS (op));
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})
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;; Return truth value of whether OP is an integer which fits the range
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;; constraining immediate operands in three-address insns.
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(define_predicate "uint5_operand"
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(match_code "const_int")
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{
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return (GET_CODE (op) == CONST_INT && INT_U5_BITS (op));
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})
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;; Return truth value of whether OP is an integer which fits the range
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;; constraining immediate operands in three-address insns.
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(define_predicate "int11_operand"
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(match_code "const_int")
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{
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return (GET_CODE (op) == CONST_INT && INT_11_BITS (op));
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})
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;; Return truth value of whether OP is an integer which fits the range
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;; constraining immediate operands in three-address insns.
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(define_predicate "uint32_operand"
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(match_code "const_int,const_double")
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{
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#if HOST_BITS_PER_WIDE_INT > 32
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/* All allowed constants will fit a CONST_INT. */
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return (GET_CODE (op) == CONST_INT
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&& (INTVAL (op) >= 0 && INTVAL (op) < (HOST_WIDE_INT) 1 << 32));
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#else
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return (GET_CODE (op) == CONST_INT
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|| (GET_CODE (op) == CONST_DOUBLE
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&& CONST_DOUBLE_HIGH (op) == 0));
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#endif
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})
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;; Return truth value of whether OP is an integer which fits the range
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;; constraining immediate operands in three-address insns.
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(define_predicate "arith5_operand"
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(match_code "subreg,reg,const_int")
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{
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return register_operand (op, mode) || int5_operand (op, mode);
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})
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;; True iff depi or extru can be used to compute (reg & OP).
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(define_predicate "and_operand"
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(match_code "subreg,reg,const_int")
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{
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return (register_operand (op, mode)
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|| (GET_CODE (op) == CONST_INT && and_mask_p (INTVAL (op))));
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})
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;; True iff depi can be used to compute (reg | OP).
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(define_predicate "ior_operand"
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(match_code "const_int")
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{
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return (GET_CODE (op) == CONST_INT && ior_mask_p (INTVAL (op)));
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})
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;; True iff OP is a CONST_INT of the forms 0...0xxxx or
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;; 0...01...1xxxx. Such values can be the left hand side x in (x <<
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;; r), using the zvdepi instruction.
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(define_predicate "lhs_lshift_cint_operand"
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(match_code "const_int")
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{
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unsigned HOST_WIDE_INT x;
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if (GET_CODE (op) != CONST_INT)
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return 0;
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x = INTVAL (op) >> 4;
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return (x & (x + 1)) == 0;
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})
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;; TODO: Add a comment here.
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(define_predicate "lhs_lshift_operand"
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(match_code "subreg,reg,const_int")
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{
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return register_operand (op, mode) || lhs_lshift_cint_operand (op, mode);
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})
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;; TODO: Add a comment here.
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(define_predicate "arith32_operand"
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(match_code "subreg,reg,const_int")
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{
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return register_operand (op, mode) || GET_CODE (op) == CONST_INT;
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})
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;; TODO: Add a comment here.
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(define_predicate "pc_or_label_operand"
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(match_code "pc,label_ref")
|
|
{
|
|
return (GET_CODE (op) == PC || GET_CODE (op) == LABEL_REF);
|
|
})
|
|
|
|
;; TODO: Add a comment here.
|
|
|
|
(define_predicate "plus_xor_ior_operator"
|
|
(match_code "plus,xor,ior")
|
|
{
|
|
return (GET_CODE (op) == PLUS || GET_CODE (op) == XOR
|
|
|| GET_CODE (op) == IOR);
|
|
})
|
|
|
|
;; Return 1 if OP is a CONST_INT with the value 2, 4, or 8. These are
|
|
;; the valid constant for shadd instructions.
|
|
|
|
(define_predicate "shadd_operand"
|
|
(match_code "const_int")
|
|
{
|
|
return (GET_CODE (op) == CONST_INT && shadd_constant_p (INTVAL (op)));
|
|
})
|
|
|
|
;; TODO: Add a comment here.
|
|
|
|
(define_predicate "div_operand"
|
|
(match_code "reg,const_int")
|
|
{
|
|
return (mode == SImode
|
|
&& ((GET_CODE (op) == REG && REGNO (op) == 25)
|
|
|| (GET_CODE (op) == CONST_INT && INTVAL (op) > 0
|
|
&& INTVAL (op) < 16 && magic_milli[INTVAL (op)])));
|
|
})
|
|
|
|
;; Return nonzero if OP is an integer register, else return zero.
|
|
|
|
(define_predicate "ireg_operand"
|
|
(match_code "reg")
|
|
{
|
|
return (GET_CODE (op) == REG && REGNO (op) > 0 && REGNO (op) < 32);
|
|
})
|
|
|
|
;; Return 1 if this is a comparison operator. This allows the use of
|
|
;; MATCH_OPERATOR to recognize all the branch insns.
|
|
|
|
(define_predicate "cmpib_comparison_operator"
|
|
(match_code "eq,ne,lt,le,leu,gt,gtu,ge")
|
|
{
|
|
return ((mode == VOIDmode || GET_MODE (op) == mode)
|
|
&& (GET_CODE (op) == EQ
|
|
|| GET_CODE (op) == NE
|
|
|| GET_CODE (op) == GT
|
|
|| GET_CODE (op) == GTU
|
|
|| GET_CODE (op) == GE
|
|
|| GET_CODE (op) == LT
|
|
|| GET_CODE (op) == LE
|
|
|| GET_CODE (op) == LEU));
|
|
})
|
|
|
|
;; Return 1 if OP is an operator suitable for use in a movb
|
|
;; instruction.
|
|
|
|
(define_predicate "movb_comparison_operator"
|
|
(match_code "eq,ne,lt,ge")
|
|
{
|
|
return (GET_CODE (op) == EQ || GET_CODE (op) == NE
|
|
|| GET_CODE (op) == LT || GET_CODE (op) == GE);
|
|
})
|