178 lines
5.6 KiB
Markdown
178 lines
5.6 KiB
Markdown
;; Scheduling description for Alpha EV6.
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;; Copyright (C) 2002, 2004, 2005, 2007 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3. If not see
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;; <http://www.gnu.org/licenses/>.
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; EV6 can issue 4 insns per clock. It's out-of-order, so this isn't
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; expected to help over-much, but a precise description can be important
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; for software pipelining.
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;
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; EV6 has two symmetric pairs ("clusters") of two asymmetric integer
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; units ("upper" and "lower"), yielding pipe names U0, U1, L0, L1.
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;
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; ??? The clusters have independent register files that are re-synced
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; every cycle. Thus there is one additional cycle of latency between
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; insns issued on different clusters. Possibly model that by duplicating
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; all EBOX insn_reservations that can issue to either cluster, increasing
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; all latencies by one, and adding bypasses within the cluster.
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;
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; ??? In addition, instruction order affects cluster issue.
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(define_automaton "ev6_0,ev6_1")
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(define_cpu_unit "ev6_u0,ev6_u1,ev6_l0,ev6_l1" "ev6_0")
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(define_reservation "ev6_u" "ev6_u0|ev6_u1")
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(define_reservation "ev6_l" "ev6_l0|ev6_l1")
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(define_reservation "ev6_ebox" "ev6_u|ev6_l")
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(define_cpu_unit "ev6_fa" "ev6_1")
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(define_cpu_unit "ev6_fm,ev6_fst0,ev6_fst1" "ev6_0")
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(define_reservation "ev6_fst" "ev6_fst0|ev6_fst1")
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; Assume type "multi" single issues.
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(define_insn_reservation "ev6_multi" 1
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "multi"))
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"ev6_u0+ev6_u1+ev6_l0+ev6_l1+ev6_fa+ev6_fm+ev6_fst0+ev6_fst1")
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; Integer loads take at least 3 clocks, and only issue to lower units.
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; adjust_cost still factors in user-specified memory latency, so return 1 here.
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(define_insn_reservation "ev6_ild" 1
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "ild,ldsym,ld_l"))
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"ev6_l")
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(define_insn_reservation "ev6_ist" 1
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "ist,st_c"))
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"ev6_l")
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(define_insn_reservation "ev6_mb" 1
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "mb"))
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"ev6_l1")
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; FP loads take at least 4 clocks. adjust_cost still factors
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; in user-specified memory latency, so return 2 here.
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(define_insn_reservation "ev6_fld" 2
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "fld"))
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"ev6_l")
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; The FPU communicates with memory and the integer register file
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; via two fp store units. We need a slot in the fst immediately, and
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; a slot in LOW after the operand data is ready. At which point the
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; data may be moved either to the store queue or the integer register
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; file and the insn retired.
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(define_insn_reservation "ev6_fst" 3
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "fst"))
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"ev6_fst,nothing,ev6_l")
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; Arithmetic goes anywhere.
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(define_insn_reservation "ev6_arith" 1
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "iadd,ilog,icmp"))
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"ev6_ebox")
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; Motion video insns also issue only to U0, and take three ticks.
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(define_insn_reservation "ev6_mvi" 3
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "mvi"))
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"ev6_u0")
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; Shifts issue to upper units.
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(define_insn_reservation "ev6_shift" 1
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "shift"))
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"ev6_u")
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; Multiplies issue only to U1, and all take 7 ticks.
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(define_insn_reservation "ev6_imul" 7
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "imul"))
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"ev6_u1")
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; Conditional moves decompose into two independent primitives, each taking
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; one cycle. Since ev6 is out-of-order, we can't see anything but two cycles.
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(define_insn_reservation "ev6_icmov" 2
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "icmov"))
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"ev6_ebox,ev6_ebox")
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; Integer branches issue to upper units
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(define_insn_reservation "ev6_ibr" 1
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "ibr,callpal"))
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"ev6_u")
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; Calls only issue to L0.
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(define_insn_reservation "ev6_jsr" 1
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "jsr"))
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"ev6_l0")
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; Ftoi/itof only issue to lower pipes.
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(define_insn_reservation "ev6_itof" 3
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "itof"))
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"ev6_l")
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(define_insn_reservation "ev6_ftoi" 3
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "ftoi"))
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"ev6_fst,nothing,ev6_l")
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(define_insn_reservation "ev6_fmul" 4
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "fmul"))
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"ev6_fm")
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(define_insn_reservation "ev6_fadd" 4
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "fadd,fcpys,fbr"))
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"ev6_fa")
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(define_insn_reservation "ev6_fcmov" 8
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(and (eq_attr "tune" "ev6")
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(eq_attr "type" "fcmov"))
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"ev6_fa,nothing*3,ev6_fa")
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(define_insn_reservation "ev6_fdivsf" 12
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(and (eq_attr "tune" "ev6")
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(and (eq_attr "type" "fdiv")
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(eq_attr "opsize" "si")))
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"ev6_fa*9")
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(define_insn_reservation "ev6_fdivdf" 15
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(and (eq_attr "tune" "ev6")
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(and (eq_attr "type" "fdiv")
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(eq_attr "opsize" "di")))
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"ev6_fa*12")
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(define_insn_reservation "ev6_sqrtsf" 18
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(and (eq_attr "tune" "ev6")
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(and (eq_attr "type" "fsqrt")
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(eq_attr "opsize" "si")))
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"ev6_fa*15")
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(define_insn_reservation "ev6_sqrtdf" 33
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(and (eq_attr "tune" "ev6")
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(and (eq_attr "type" "fsqrt")
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(eq_attr "opsize" "di")))
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"ev6_fa*30")
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