592 lines
14 KiB
ArmAsm
592 lines
14 KiB
ArmAsm
/* -----------------------------------------------------------------------
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n32.S - Copyright (c) 1996, 1998, 2005, 2007, 2009, 2010 Red Hat, Inc.
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MIPS Foreign Function Interface
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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``Software''), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice shall be included
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in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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DEALINGS IN THE SOFTWARE.
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----------------------------------------------------------------------- */
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#define LIBFFI_ASM
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#include <fficonfig.h>
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#include <ffi.h>
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/* Only build this code if we are compiling for n32 */
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#if defined(FFI_MIPS_N32)
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#define callback a0
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#define bytes a2
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#define flags a3
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#define raddr a4
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#define fn a5
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#define SIZEOF_FRAME ( 8 * FFI_SIZEOF_ARG )
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#ifdef __GNUC__
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.abicalls
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#endif
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.text
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.align 2
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.globl ffi_call_N32
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.ent ffi_call_N32
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ffi_call_N32:
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.LFB3:
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.frame $fp, SIZEOF_FRAME, ra
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.mask 0xc0000000,-FFI_SIZEOF_ARG
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.fmask 0x00000000,0
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# Prologue
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SUBU $sp, SIZEOF_FRAME # Frame size
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.LCFI0:
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REG_S $fp, SIZEOF_FRAME - 2*FFI_SIZEOF_ARG($sp) # Save frame pointer
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REG_S ra, SIZEOF_FRAME - 1*FFI_SIZEOF_ARG($sp) # Save return address
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.LCFI1:
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move $fp, $sp
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.LCFI3:
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move t9, callback # callback function pointer
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REG_S bytes, 2*FFI_SIZEOF_ARG($fp) # bytes
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REG_S flags, 3*FFI_SIZEOF_ARG($fp) # flags
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REG_S raddr, 4*FFI_SIZEOF_ARG($fp) # raddr
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REG_S fn, 5*FFI_SIZEOF_ARG($fp) # fn
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# Allocate at least 4 words in the argstack
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move v0, bytes
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bge bytes, 4 * FFI_SIZEOF_ARG, bigger
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LI v0, 4 * FFI_SIZEOF_ARG
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b sixteen
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bigger:
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ADDU t4, v0, 2 * FFI_SIZEOF_ARG -1 # make sure it is aligned
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and v0, t4, -2 * FFI_SIZEOF_ARG # to a proper boundry.
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sixteen:
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SUBU $sp, $sp, v0 # move the stack pointer to reflect the
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# arg space
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move a0, $sp # 4 * FFI_SIZEOF_ARG
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ADDU a3, $fp, 3 * FFI_SIZEOF_ARG
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# Call ffi_prep_args
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jal t9
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# Copy the stack pointer to t9
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move t9, $sp
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# Fix the stack if there are more than 8 64bit slots worth
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# of arguments.
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# Load the number of bytes
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REG_L t6, 2*FFI_SIZEOF_ARG($fp)
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# Is it bigger than 8 * FFI_SIZEOF_ARG?
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daddiu t8, t6, -(8 * FFI_SIZEOF_ARG)
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bltz t8, loadregs
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ADDU t9, t9, t8
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loadregs:
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REG_L t6, 3*FFI_SIZEOF_ARG($fp) # load the flags word into t6.
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and t4, t6, ((1<<FFI_FLAG_BITS)-1)
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bnez t4, arg1_floatp
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REG_L a0, 0*FFI_SIZEOF_ARG(t9)
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b arg1_next
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arg1_floatp:
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bne t4, FFI_TYPE_FLOAT, arg1_doublep
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l.s $f12, 0*FFI_SIZEOF_ARG(t9)
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b arg1_next
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arg1_doublep:
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l.d $f12, 0*FFI_SIZEOF_ARG(t9)
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arg1_next:
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SRL t4, t6, 1*FFI_FLAG_BITS
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and t4, ((1<<FFI_FLAG_BITS)-1)
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bnez t4, arg2_floatp
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REG_L a1, 1*FFI_SIZEOF_ARG(t9)
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b arg2_next
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arg2_floatp:
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bne t4, FFI_TYPE_FLOAT, arg2_doublep
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l.s $f13, 1*FFI_SIZEOF_ARG(t9)
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b arg2_next
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arg2_doublep:
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l.d $f13, 1*FFI_SIZEOF_ARG(t9)
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arg2_next:
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SRL t4, t6, 2*FFI_FLAG_BITS
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and t4, ((1<<FFI_FLAG_BITS)-1)
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bnez t4, arg3_floatp
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REG_L a2, 2*FFI_SIZEOF_ARG(t9)
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b arg3_next
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arg3_floatp:
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bne t4, FFI_TYPE_FLOAT, arg3_doublep
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l.s $f14, 2*FFI_SIZEOF_ARG(t9)
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b arg3_next
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arg3_doublep:
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l.d $f14, 2*FFI_SIZEOF_ARG(t9)
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arg3_next:
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SRL t4, t6, 3*FFI_FLAG_BITS
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and t4, ((1<<FFI_FLAG_BITS)-1)
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bnez t4, arg4_floatp
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REG_L a3, 3*FFI_SIZEOF_ARG(t9)
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b arg4_next
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arg4_floatp:
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bne t4, FFI_TYPE_FLOAT, arg4_doublep
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l.s $f15, 3*FFI_SIZEOF_ARG(t9)
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b arg4_next
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arg4_doublep:
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l.d $f15, 3*FFI_SIZEOF_ARG(t9)
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arg4_next:
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SRL t4, t6, 4*FFI_FLAG_BITS
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and t4, ((1<<FFI_FLAG_BITS)-1)
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bnez t4, arg5_floatp
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REG_L a4, 4*FFI_SIZEOF_ARG(t9)
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b arg5_next
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arg5_floatp:
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bne t4, FFI_TYPE_FLOAT, arg5_doublep
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l.s $f16, 4*FFI_SIZEOF_ARG(t9)
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b arg5_next
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arg5_doublep:
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l.d $f16, 4*FFI_SIZEOF_ARG(t9)
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arg5_next:
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SRL t4, t6, 5*FFI_FLAG_BITS
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and t4, ((1<<FFI_FLAG_BITS)-1)
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bnez t4, arg6_floatp
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REG_L a5, 5*FFI_SIZEOF_ARG(t9)
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b arg6_next
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arg6_floatp:
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bne t4, FFI_TYPE_FLOAT, arg6_doublep
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l.s $f17, 5*FFI_SIZEOF_ARG(t9)
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b arg6_next
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arg6_doublep:
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l.d $f17, 5*FFI_SIZEOF_ARG(t9)
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arg6_next:
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SRL t4, t6, 6*FFI_FLAG_BITS
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and t4, ((1<<FFI_FLAG_BITS)-1)
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bnez t4, arg7_floatp
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REG_L a6, 6*FFI_SIZEOF_ARG(t9)
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b arg7_next
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arg7_floatp:
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bne t4, FFI_TYPE_FLOAT, arg7_doublep
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l.s $f18, 6*FFI_SIZEOF_ARG(t9)
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b arg7_next
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arg7_doublep:
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l.d $f18, 6*FFI_SIZEOF_ARG(t9)
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arg7_next:
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SRL t4, t6, 7*FFI_FLAG_BITS
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and t4, ((1<<FFI_FLAG_BITS)-1)
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bnez t4, arg8_floatp
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REG_L a7, 7*FFI_SIZEOF_ARG(t9)
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b arg8_next
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arg8_floatp:
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bne t4, FFI_TYPE_FLOAT, arg8_doublep
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l.s $f19, 7*FFI_SIZEOF_ARG(t9)
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b arg8_next
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arg8_doublep:
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l.d $f19, 7*FFI_SIZEOF_ARG(t9)
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arg8_next:
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callit:
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# Load the function pointer
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REG_L t9, 5*FFI_SIZEOF_ARG($fp)
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# If the return value pointer is NULL, assume no return value.
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REG_L t5, 4*FFI_SIZEOF_ARG($fp)
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beqz t5, noretval
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# Shift the return type flag over
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SRL t6, 8*FFI_FLAG_BITS
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beq t6, FFI_TYPE_SINT32, retint
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bne t6, FFI_TYPE_INT, retfloat
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retint:
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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REG_S v0, 0(t4)
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b epilogue
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retfloat:
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bne t6, FFI_TYPE_FLOAT, retdouble
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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s.s $f0, 0(t4)
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b epilogue
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retdouble:
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bne t6, FFI_TYPE_DOUBLE, retstruct_d
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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s.d $f0, 0(t4)
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b epilogue
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retstruct_d:
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bne t6, FFI_TYPE_STRUCT_D, retstruct_f
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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s.d $f0, 0(t4)
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b epilogue
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retstruct_f:
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bne t6, FFI_TYPE_STRUCT_F, retstruct_d_d
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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s.s $f0, 0(t4)
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b epilogue
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retstruct_d_d:
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bne t6, FFI_TYPE_STRUCT_DD, retstruct_f_f
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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s.d $f0, 0(t4)
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s.d $f2, 8(t4)
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b epilogue
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retstruct_f_f:
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bne t6, FFI_TYPE_STRUCT_FF, retstruct_d_f
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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s.s $f0, 0(t4)
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s.s $f2, 4(t4)
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b epilogue
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retstruct_d_f:
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bne t6, FFI_TYPE_STRUCT_DF, retstruct_f_d
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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s.d $f0, 0(t4)
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s.s $f2, 8(t4)
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b epilogue
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retstruct_f_d:
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bne t6, FFI_TYPE_STRUCT_FD, retstruct_d_soft
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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s.s $f0, 0(t4)
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s.d $f2, 8(t4)
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b epilogue
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retstruct_d_soft:
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bne t6, FFI_TYPE_STRUCT_D_SOFT, retstruct_f_soft
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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sd v0, 0(t4)
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b epilogue
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retstruct_f_soft:
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bne t6, FFI_TYPE_STRUCT_F_SOFT, retstruct_d_d_soft
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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sw v0, 0(t4)
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b epilogue
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retstruct_d_d_soft:
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bne t6, FFI_TYPE_STRUCT_DD_SOFT, retstruct_f_f_soft
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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sd v0, 0(t4)
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sd v1, 8(t4)
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b epilogue
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retstruct_f_f_soft:
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bne t6, FFI_TYPE_STRUCT_FF_SOFT, retstruct_d_f_soft
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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sw v0, 0(t4)
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sw v1, 4(t4)
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b epilogue
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retstruct_d_f_soft:
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bne t6, FFI_TYPE_STRUCT_DF_SOFT, retstruct_f_d_soft
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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sd v0, 0(t4)
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sw v1, 8(t4)
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b epilogue
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retstruct_f_d_soft:
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bne t6, FFI_TYPE_STRUCT_FD_SOFT, retstruct_small
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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sw v0, 0(t4)
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sd v1, 8(t4)
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b epilogue
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retstruct_small:
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bne t6, FFI_TYPE_STRUCT_SMALL, retstruct_small2
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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REG_S v0, 0(t4)
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b epilogue
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retstruct_small2:
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bne t6, FFI_TYPE_STRUCT_SMALL2, retstruct
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jal t9
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REG_L t4, 4*FFI_SIZEOF_ARG($fp)
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REG_S v0, 0(t4)
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REG_S v1, 8(t4)
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b epilogue
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retstruct:
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noretval:
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jal t9
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# Epilogue
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epilogue:
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move $sp, $fp
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REG_L $fp, SIZEOF_FRAME - 2*FFI_SIZEOF_ARG($sp) # Restore frame pointer
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REG_L ra, SIZEOF_FRAME - 1*FFI_SIZEOF_ARG($sp) # Restore return address
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ADDU $sp, SIZEOF_FRAME # Fix stack pointer
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j ra
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.LFE3:
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.end ffi_call_N32
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/* ffi_closure_N32. Expects address of the passed-in ffi_closure in t0
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($12). Stores any arguments passed in registers onto the stack,
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then calls ffi_closure_mips_inner_N32, which then decodes
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them.
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Stack layout:
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20 - Start of parameters, original sp
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19 - Called function a7 save
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18 - Called function a6 save
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17 - Called function a5 save
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16 - Called function a4 save
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15 - Called function a3 save
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14 - Called function a2 save
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13 - Called function a1 save
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12 - Called function a0 save
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11 - Called function f19
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10 - Called function f18
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9 - Called function f17
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8 - Called function f16
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7 - Called function f15
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6 - Called function f14
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5 - Called function f13
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4 - Called function f12
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3 - return value high (v1 or $f2)
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2 - return value low (v0 or $f0)
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1 - ra save
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0 - gp save our sp points here
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*/
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#define SIZEOF_FRAME2 (20 * FFI_SIZEOF_ARG)
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#define A7_OFF2 (19 * FFI_SIZEOF_ARG)
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#define A6_OFF2 (18 * FFI_SIZEOF_ARG)
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#define A5_OFF2 (17 * FFI_SIZEOF_ARG)
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#define A4_OFF2 (16 * FFI_SIZEOF_ARG)
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#define A3_OFF2 (15 * FFI_SIZEOF_ARG)
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#define A2_OFF2 (14 * FFI_SIZEOF_ARG)
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#define A1_OFF2 (13 * FFI_SIZEOF_ARG)
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#define A0_OFF2 (12 * FFI_SIZEOF_ARG)
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#define F19_OFF2 (11 * FFI_SIZEOF_ARG)
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#define F18_OFF2 (10 * FFI_SIZEOF_ARG)
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#define F17_OFF2 (9 * FFI_SIZEOF_ARG)
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#define F16_OFF2 (8 * FFI_SIZEOF_ARG)
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#define F15_OFF2 (7 * FFI_SIZEOF_ARG)
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#define F14_OFF2 (6 * FFI_SIZEOF_ARG)
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#define F13_OFF2 (5 * FFI_SIZEOF_ARG)
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#define F12_OFF2 (4 * FFI_SIZEOF_ARG)
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#define V1_OFF2 (3 * FFI_SIZEOF_ARG)
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#define V0_OFF2 (2 * FFI_SIZEOF_ARG)
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#define RA_OFF2 (1 * FFI_SIZEOF_ARG)
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#define GP_OFF2 (0 * FFI_SIZEOF_ARG)
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.align 2
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.globl ffi_closure_N32
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.ent ffi_closure_N32
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ffi_closure_N32:
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.LFB2:
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.frame $sp, SIZEOF_FRAME2, ra
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.mask 0x90000000,-(SIZEOF_FRAME2 - RA_OFF2)
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.fmask 0x00000000,0
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SUBU $sp, SIZEOF_FRAME2
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.LCFI5:
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.cpsetup t9, GP_OFF2, ffi_closure_N32
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REG_S ra, RA_OFF2($sp) # Save return address
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.LCFI6:
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# Store all possible argument registers. If there are more than
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# fit in registers, then they were stored on the stack.
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REG_S a0, A0_OFF2($sp)
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REG_S a1, A1_OFF2($sp)
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REG_S a2, A2_OFF2($sp)
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REG_S a3, A3_OFF2($sp)
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REG_S a4, A4_OFF2($sp)
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REG_S a5, A5_OFF2($sp)
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REG_S a6, A6_OFF2($sp)
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REG_S a7, A7_OFF2($sp)
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# Store all possible float/double registers.
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s.d $f12, F12_OFF2($sp)
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s.d $f13, F13_OFF2($sp)
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s.d $f14, F14_OFF2($sp)
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s.d $f15, F15_OFF2($sp)
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s.d $f16, F16_OFF2($sp)
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s.d $f17, F17_OFF2($sp)
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s.d $f18, F18_OFF2($sp)
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s.d $f19, F19_OFF2($sp)
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# Call ffi_closure_mips_inner_N32 to do the real work.
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LA t9, ffi_closure_mips_inner_N32
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move a0, $12 # Pointer to the ffi_closure
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ADDU a1, $sp, V0_OFF2
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ADDU a2, $sp, A0_OFF2
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ADDU a3, $sp, F12_OFF2
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jalr t9
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# Return flags are in v0
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bne v0, FFI_TYPE_SINT32, cls_retint
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lw v0, V0_OFF2($sp)
|
|
b cls_epilogue
|
|
|
|
cls_retint:
|
|
bne v0, FFI_TYPE_INT, cls_retfloat
|
|
REG_L v0, V0_OFF2($sp)
|
|
b cls_epilogue
|
|
|
|
cls_retfloat:
|
|
bne v0, FFI_TYPE_FLOAT, cls_retdouble
|
|
l.s $f0, V0_OFF2($sp)
|
|
b cls_epilogue
|
|
|
|
cls_retdouble:
|
|
bne v0, FFI_TYPE_DOUBLE, cls_retstruct_d
|
|
l.d $f0, V0_OFF2($sp)
|
|
b cls_epilogue
|
|
|
|
cls_retstruct_d:
|
|
bne v0, FFI_TYPE_STRUCT_D, cls_retstruct_f
|
|
l.d $f0, V0_OFF2($sp)
|
|
b cls_epilogue
|
|
|
|
cls_retstruct_f:
|
|
bne v0, FFI_TYPE_STRUCT_F, cls_retstruct_d_d
|
|
l.s $f0, V0_OFF2($sp)
|
|
b cls_epilogue
|
|
|
|
cls_retstruct_d_d:
|
|
bne v0, FFI_TYPE_STRUCT_DD, cls_retstruct_f_f
|
|
l.d $f0, V0_OFF2($sp)
|
|
l.d $f2, V1_OFF2($sp)
|
|
b cls_epilogue
|
|
|
|
cls_retstruct_f_f:
|
|
bne v0, FFI_TYPE_STRUCT_FF, cls_retstruct_d_f
|
|
l.s $f0, V0_OFF2($sp)
|
|
l.s $f2, V1_OFF2($sp)
|
|
b cls_epilogue
|
|
|
|
cls_retstruct_d_f:
|
|
bne v0, FFI_TYPE_STRUCT_DF, cls_retstruct_f_d
|
|
l.d $f0, V0_OFF2($sp)
|
|
l.s $f2, V1_OFF2($sp)
|
|
b cls_epilogue
|
|
|
|
cls_retstruct_f_d:
|
|
bne v0, FFI_TYPE_STRUCT_FD, cls_retstruct_small2
|
|
l.s $f0, V0_OFF2($sp)
|
|
l.d $f2, V1_OFF2($sp)
|
|
b cls_epilogue
|
|
|
|
cls_retstruct_small2:
|
|
REG_L v0, V0_OFF2($sp)
|
|
REG_L v1, V1_OFF2($sp)
|
|
|
|
# Epilogue
|
|
cls_epilogue:
|
|
REG_L ra, RA_OFF2($sp) # Restore return address
|
|
.cpreturn
|
|
ADDU $sp, SIZEOF_FRAME2
|
|
j ra
|
|
.LFE2:
|
|
.end ffi_closure_N32
|
|
|
|
#ifdef __GNUC__
|
|
.section .eh_frame,"aw",@progbits
|
|
.Lframe1:
|
|
.4byte .LECIE1-.LSCIE1 # length
|
|
.LSCIE1:
|
|
.4byte 0x0 # CIE
|
|
.byte 0x1 # Version 1
|
|
.ascii "\000" # Augmentation
|
|
.uleb128 0x1 # Code alignment 1
|
|
.sleb128 -4 # Data alignment -4
|
|
.byte 0x1f # Return Address $31
|
|
.byte 0xc # DW_CFA_def_cfa
|
|
.uleb128 0x1d # in $sp
|
|
.uleb128 0x0 # offset 0
|
|
.align EH_FRAME_ALIGN
|
|
.LECIE1:
|
|
|
|
.LSFDE1:
|
|
.4byte .LEFDE1-.LASFDE1 # length.
|
|
.LASFDE1:
|
|
.4byte .LASFDE1-.Lframe1 # CIE_pointer.
|
|
FDE_ADDR_BYTES .LFB3 # initial_location.
|
|
FDE_ADDR_BYTES .LFE3-.LFB3 # address_range.
|
|
.byte 0x4 # DW_CFA_advance_loc4
|
|
.4byte .LCFI0-.LFB3 # to .LCFI0
|
|
.byte 0xe # DW_CFA_def_cfa_offset
|
|
.uleb128 SIZEOF_FRAME # adjust stack.by SIZEOF_FRAME
|
|
.byte 0x4 # DW_CFA_advance_loc4
|
|
.4byte .LCFI1-.LCFI0 # to .LCFI1
|
|
.byte 0x9e # DW_CFA_offset of $fp
|
|
.uleb128 2*FFI_SIZEOF_ARG/4 #
|
|
.byte 0x9f # DW_CFA_offset of ra
|
|
.uleb128 1*FFI_SIZEOF_ARG/4 #
|
|
.byte 0x4 # DW_CFA_advance_loc4
|
|
.4byte .LCFI3-.LCFI1 # to .LCFI3
|
|
.byte 0xd # DW_CFA_def_cfa_register
|
|
.uleb128 0x1e # in $fp
|
|
.align EH_FRAME_ALIGN
|
|
.LEFDE1:
|
|
.LSFDE3:
|
|
.4byte .LEFDE3-.LASFDE3 # length
|
|
.LASFDE3:
|
|
.4byte .LASFDE3-.Lframe1 # CIE_pointer.
|
|
FDE_ADDR_BYTES .LFB2 # initial_location.
|
|
FDE_ADDR_BYTES .LFE2-.LFB2 # address_range.
|
|
.byte 0x4 # DW_CFA_advance_loc4
|
|
.4byte .LCFI5-.LFB2 # to .LCFI5
|
|
.byte 0xe # DW_CFA_def_cfa_offset
|
|
.uleb128 SIZEOF_FRAME2 # adjust stack.by SIZEOF_FRAME
|
|
.byte 0x4 # DW_CFA_advance_loc4
|
|
.4byte .LCFI6-.LCFI5 # to .LCFI6
|
|
.byte 0x9c # DW_CFA_offset of $gp ($28)
|
|
.uleb128 (SIZEOF_FRAME2 - GP_OFF2)/4
|
|
.byte 0x9f # DW_CFA_offset of ra ($31)
|
|
.uleb128 (SIZEOF_FRAME2 - RA_OFF2)/4
|
|
.align EH_FRAME_ALIGN
|
|
.LEFDE3:
|
|
#endif /* __GNUC__ */
|
|
|
|
#endif
|