25 lines
1.1 KiB
C
25 lines
1.1 KiB
C
/* Verify that if IP is saved to ensure stack alignment, we don't load
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it into sp. */
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/* { dg-do compile } */
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/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mcpu=*" } { "-mcpu=iwmmxt" } } */
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/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mabi=*" } { "-mabi=iwmmxt" } } */
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/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-march=*" } { "-march=iwmmxt" } } */
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/* { dg-options "-O -mno-apcs-frame -mcpu=iwmmxt -mabi=iwmmxt" } */
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/* { dg-require-effective-target arm32 } */
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/* { dg-require-effective-target arm_iwmmxt_ok } */
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/* { dg-final { scan-assembler "ldmfd\[ ]sp!.*ip,\[ ]*pc" } } */
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/* This function uses all the call-saved registers, namely r4, r5, r6,
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r7, r8, r9, sl, fp. Since we also save lr, that leaves an odd
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number of registers, and the compiler will push ip to align the
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stack. Make sure that we restore ip into ip, not into sp as is
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done when using a frame pointer. The -mno-apcs-frame option
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permits the frame pointer to be used as an ordinary register. */
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void
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foo(void)
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{
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__asm volatile ("" : : :
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"r4", "r5", "r6", "r7", "r8", "r9", "sl", "fp", "lr");
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}
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