652 lines
19 KiB
C
652 lines
19 KiB
C
/* GCC backend definitions for the Renesas RX processor.
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Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
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Contributed by Red Hat.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#define TARGET_CPU_CPP_BUILTINS() \
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do \
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{ \
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builtin_define ("__RX__"); \
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builtin_assert ("cpu=RX"); \
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if (rx_cpu_type == RX610) \
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builtin_assert ("machine=RX610"); \
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else \
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builtin_assert ("machine=RX600"); \
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\
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if (TARGET_BIG_ENDIAN_DATA) \
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builtin_define ("__RX_BIG_ENDIAN__"); \
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else \
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builtin_define ("__RX_LITTLE_ENDIAN__");\
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\
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if (TARGET_64BIT_DOUBLES) \
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builtin_define ("__RX_64BIT_DOUBLES__");\
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else \
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builtin_define ("__RX_32BIT_DOUBLES__");\
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\
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if (ALLOW_RX_FPU_INSNS) \
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builtin_define ("__RX_FPU_INSNS__"); \
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\
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if (TARGET_AS100_SYNTAX) \
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builtin_define ("__RX_AS100_SYNTAX__"); \
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else \
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builtin_define ("__RX_GAS_SYNTAX__"); \
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} \
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while (0)
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enum rx_cpu_types
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{
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RX600,
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RX610,
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RX200
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};
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extern enum rx_cpu_types rx_cpu_type;
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#undef CC1_SPEC
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#define CC1_SPEC "\
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%{mas100-syntax:%{gdwarf*:%e-mas100-syntax is incompatible with -gdwarf}} \
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%{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}"
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#undef STARTFILE_SPEC
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#define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s"
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#undef ENDFILE_SPEC
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#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
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#undef ASM_SPEC
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#define ASM_SPEC "\
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%{mbig-endian-data:-mbig-endian-data} \
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%{m64bit-doubles:-m64bit-doubles} \
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%{!m64bit-doubles:-m32bit-doubles} \
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%{msmall-data-limit*:-msmall-data-limit} \
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%{mrelax:-relax} \
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"
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#undef LIB_SPEC
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#define LIB_SPEC " \
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--start-group \
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-lc \
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%{msim*:-lsim}%{!msim*:-lnosys} \
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%{fprofile-arcs|fprofile-generate|coverage:-lgcov} \
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--end-group \
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%{!T*: %{msim*:%Trx-sim.ld}%{!msim*:%Trx.ld}} \
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"
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#undef LINK_SPEC
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#define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
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#define BITS_BIG_ENDIAN 0
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#define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
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#define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
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#ifdef __RX_BIG_ENDIAN__
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#define LIBGCC2_WORDS_BIG_ENDIAN 1
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#else
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#define LIBGCC2_WORDS_BIG_ENDIAN 0
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#endif
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#define UNITS_PER_WORD 4
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#define INT_TYPE_SIZE 32
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#define LONG_TYPE_SIZE 32
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#define LONG_LONG_TYPE_SIZE 64
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#define FLOAT_TYPE_SIZE 32
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#define DOUBLE_TYPE_SIZE (TARGET_64BIT_DOUBLES ? 64 : 32)
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#define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
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#ifdef __RX_32BIT_DOUBLES__
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#define LIBGCC2_HAS_DF_MODE 0
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#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 32
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#define LIBGCC2_DOUBLE_TYPE_SIZE 32
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#else
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#define LIBGCC2_HAS_DF_MODE 1
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#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
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#define LIBGCC2_DOUBLE_TYPE_SIZE 64
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#endif
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#define DEFAULT_SIGNED_CHAR 0
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#define STRICT_ALIGNMENT 1
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#define FUNCTION_BOUNDARY 8
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#define BIGGEST_ALIGNMENT 32
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#define STACK_BOUNDARY 32
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#define PARM_BOUNDARY 8
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#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) 32
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#define STACK_GROWS_DOWNWARD 1
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#define FRAME_GROWS_DOWNWARD 0
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#define FIRST_PARM_OFFSET(FNDECL) 0
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#define MAX_REGS_PER_ADDRESS 2
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#define Pmode SImode
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#define POINTER_SIZE 32
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#undef SIZE_TYPE
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#define SIZE_TYPE "long unsigned int"
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#define POINTERS_EXTEND_UNSIGNED 1
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#define FUNCTION_MODE QImode
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#define CASE_VECTOR_MODE Pmode
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#define WORD_REGISTER_OPERATIONS 1
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#define HAS_LONG_COND_BRANCH 0
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#define HAS_LONG_UNCOND_BRANCH 0
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#define MOVE_MAX 4
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#define STARTING_FRAME_OFFSET 0
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#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
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#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
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#define LEGITIMATE_CONSTANT_P(X) rx_is_legitimate_constant (X)
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#define HANDLE_PRAGMA_PACK_PUSH_POP 1
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#define HAVE_PRE_DECCREMENT 1
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#define HAVE_POST_INCREMENT 1
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#define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)
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#define SLOW_BYTE_ACCESS 1
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#define STORE_FLAG_VALUE 1
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#define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
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#define SHORT_IMMEDIATES_SIGN_EXTEND 1
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enum reg_class
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{
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NO_REGS, /* No registers in set. */
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GR_REGS, /* Integer registers. */
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ALL_REGS, /* All registers. */
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LIM_REG_CLASSES /* Max value + 1. */
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};
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#define REG_CLASS_NAMES \
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{ \
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"NO_REGS", \
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"GR_REGS", \
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"ALL_REGS" \
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}
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#define REG_CLASS_CONTENTS \
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{ \
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{ 0x00000000 }, /* No registers, */ \
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{ 0x0000ffff }, /* Integer registers. */ \
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{ 0x0000ffff } /* All registers. */ \
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}
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#define IRA_COVER_CLASSES \
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{ \
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GR_REGS, LIM_REG_CLASSES \
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}
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#define N_REG_CLASSES (int) LIM_REG_CLASSES
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#define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
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+ UNITS_PER_WORD - 1) \
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/ UNITS_PER_WORD)
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#define GENERAL_REGS GR_REGS
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#define BASE_REG_CLASS GR_REGS
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#define INDEX_REG_CLASS GR_REGS
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#define FIRST_PSEUDO_REGISTER 16
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#define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \
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? GR_REGS : NO_REGS)
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#define STACK_POINTER_REGNUM 0
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#define FUNC_RETURN_REGNUM 1
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#define FRAME_POINTER_REGNUM 6
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#define ARG_POINTER_REGNUM 7
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#define STATIC_CHAIN_REGNUM 8
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#define TRAMPOLINE_TEMP_REGNUM 9
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#define STRUCT_VAL_REGNUM 15
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/* This is the register which is used to hold the address of the start
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of the small data area, if that feature is being used. Note - this
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register must not be call_used because otherwise library functions
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that are compiled without small data support might clobber it.
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FIXME: The function gcc/config/rx/rx.c:rx_gen_move_template() has a
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built in copy of this register's name, rather than constructing the
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name from this #define. */
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#define GP_BASE_REGNUM 13
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#define ELIMINABLE_REGS \
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{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
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{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
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{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
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#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
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(OFFSET) = rx_initial_elimination_offset ((FROM), (TO))
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#define FUNCTION_ARG_REGNO_P(N) (((N) >= 1) && ((N) <= 4))
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#define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM)
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#define DEFAULT_PCC_STRUCT_RETURN 0
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#define FIXED_REGISTERS \
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{ \
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1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
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}
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#define CALL_USED_REGISTERS \
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{ \
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1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1 \
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}
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#define CONDITIONAL_REGISTER_USAGE \
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rx_conditional_register_usage ()
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#define LIBCALL_VALUE(MODE) \
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gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
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|| GET_MODE_SIZE (MODE) >= 4) \
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? (MODE) \
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: SImode), \
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FUNC_RETURN_REGNUM)
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/* Order of allocation of registers. */
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#define REG_ALLOC_ORDER \
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{ 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \
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}
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#define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
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#define REGNO_IN_RANGE(REGNO, MIN, MAX) \
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(IN_RANGE ((REGNO), (MIN), (MAX)) \
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|| (reg_renumber != NULL \
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&& reg_renumber[(REGNO)] >= (MIN) \
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&& reg_renumber[(REGNO)] <= (MAX)))
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#ifdef REG_OK_STRICT
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#define REGNO_OK_FOR_BASE_P(regno) REGNO_IN_RANGE (regno, 0, 15)
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#else
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#define REGNO_OK_FOR_BASE_P(regno) 1
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#endif
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#define REGNO_OK_FOR_INDEX_P(regno) REGNO_OK_FOR_BASE_P (regno)
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#define RTX_OK_FOR_BASE(X, STRICT) \
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((STRICT) ? \
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( (REG_P (X) \
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&& REGNO_IN_RANGE (REGNO (X), 0, 15)) \
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|| (GET_CODE (X) == SUBREG \
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&& REG_P (SUBREG_REG (X)) \
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&& REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \
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: \
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( (REG_P (X) \
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|| (GET_CODE (X) == SUBREG \
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&& REG_P (SUBREG_REG (X))))))
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#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
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do \
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{ \
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if (rx_is_mode_dependent_addr (ADDR)) \
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goto LABEL; \
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} \
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while (0)
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#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
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((COUNT) == 0 \
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? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \
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: NULL_RTX)
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#define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, stack_pointer_rtx)
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#define ACCUMULATE_OUTGOING_ARGS 1
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typedef unsigned int CUMULATIVE_ARGS;
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#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
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(CUM) = 0
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#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
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rx_function_arg (& CUM, MODE, TYPE, NAMED)
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#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
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(CUM) += rx_function_arg_size (MODE, TYPE)
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#define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
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#define TRAMPOLINE_ALIGNMENT 32
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#define NO_PROFILE_COUNTERS 1
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#define PROFILE_BEFORE_PROLOGUE 1
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#define FUNCTION_PROFILER(FILE, LABELNO) \
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fprintf (FILE, "\tbsr\t__mcount\n");
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#define HARD_REGNO_NREGS(REGNO, MODE) CLASS_MAX_NREGS (0, MODE)
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#define HARD_REGNO_MODE_OK(REGNO, MODE) \
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REGNO_REG_CLASS (REGNO) == GR_REGS
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#define MODES_TIEABLE_P(MODE1, MODE2) \
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( ( GET_MODE_CLASS (MODE1) == MODE_FLOAT \
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|| GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
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== ( GET_MODE_CLASS (MODE2) == MODE_FLOAT \
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|| GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
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#define REGISTER_NAMES \
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{ \
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" \
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};
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#define ADDITIONAL_REGISTER_NAMES \
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{ \
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{ "sp", STACK_POINTER_REGNUM } \
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, { "fp", FRAME_POINTER_REGNUM } \
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, { "arg", ARG_POINTER_REGNUM } \
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, { "chain", STATIC_CHAIN_REGNUM } \
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}
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#define DATA_SECTION_ASM_OP \
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(TARGET_AS100_SYNTAX ? "\t.SECTION D,DATA" \
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: "\t.section D,\"aw\",@progbits\n\t.p2align 2")
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#define SDATA_SECTION_ASM_OP \
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(TARGET_AS100_SYNTAX ? "\t.SECTION D_2,DATA,ALIGN=2" \
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: "\t.section D_2,\"aw\",@progbits\n\t.p2align 1")
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#undef READONLY_DATA_SECTION_ASM_OP
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#define READONLY_DATA_SECTION_ASM_OP \
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(TARGET_AS100_SYNTAX ? "\t.SECTION C,ROMDATA,ALIGN=4" \
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: "\t.section C,\"a\",@progbits\n\t.p2align 2")
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#define BSS_SECTION_ASM_OP \
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(TARGET_AS100_SYNTAX ? "\t.SECTION B,DATA,ALIGN=4" \
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: "\t.section B,\"w\",@nobits\n\t.p2align 2")
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#define SBSS_SECTION_ASM_OP \
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(TARGET_AS100_SYNTAX ? "\t.SECTION B_2,DATA,ALIGN=2" \
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: "\t.section B_2,\"w\",@nobits\n\t.p2align 1")
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/* The following definitions are conditional depending upon whether the
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compiler is being built or crtstuff.c is being compiled by the built
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compiler. */
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#if defined CRT_BEGIN || defined CRT_END
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# ifdef __RX_AS100_SYNTAX
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# define TEXT_SECTION_ASM_OP "\t.SECTION P,CODE"
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# define CTORS_SECTION_ASM_OP "\t.SECTION init_array,CODE"
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# define DTORS_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
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# define INIT_ARRAY_SECTION_ASM_OP "\t.SECTION init_array,CODE"
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# define FINI_ARRAY_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
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# else
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# define TEXT_SECTION_ASM_OP "\t.section P,\"ax\""
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# define CTORS_SECTION_ASM_OP \
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"\t.section\t.init_array,\"aw\",@init_array"
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# define DTORS_SECTION_ASM_OP \
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"\t.section\t.fini_array,\"aw\",@fini_array"
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# define INIT_ARRAY_SECTION_ASM_OP \
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"\t.section\t.init_array,\"aw\",@init_array"
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# define FINI_ARRAY_SECTION_ASM_OP \
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"\t.section\t.fini_array,\"aw\",@fini_array"
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# endif
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#else
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# define TEXT_SECTION_ASM_OP \
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(TARGET_AS100_SYNTAX ? "\t.SECTION P,CODE" : "\t.section P,\"ax\"")
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# define CTORS_SECTION_ASM_OP \
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(TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
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: "\t.section\t.init_array,\"aw\",@init_array")
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# define DTORS_SECTION_ASM_OP \
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(TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
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: "\t.section\t.fini_array,\"aw\",@fini_array")
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# define INIT_ARRAY_SECTION_ASM_OP \
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(TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
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: "\t.section\t.init_array,\"aw\",@init_array")
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# define FINI_ARRAY_SECTION_ASM_OP \
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(TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
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: "\t.section\t.fini_array,\"aw\",@fini_array")
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#endif
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#define GLOBAL_ASM_OP \
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(TARGET_AS100_SYNTAX ? "\t.GLB\t" : "\t.global\t")
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#define ASM_COMMENT_START " ;"
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#define ASM_APP_ON ""
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#define ASM_APP_OFF ""
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#define LOCAL_LABEL_PREFIX "L"
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#undef USER_LABEL_PREFIX
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#define USER_LABEL_PREFIX "_"
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#define ASM_OUTPUT_ALIGN(STREAM, LOG) \
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do \
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{ \
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if ((LOG) == 0) \
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break; \
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if (TARGET_AS100_SYNTAX) \
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{ \
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if ((LOG) >= 2) \
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fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
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else \
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fprintf (STREAM, "\t.ALIGN 2\n"); \
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} \
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else \
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fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
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} \
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while (0)
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#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
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fprintf (FILE, TARGET_AS100_SYNTAX ? "\t.LWORD L%d\n" : "\t.long .L%d\n", \
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VALUE)
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/* This is how to output an element of a case-vector that is relative.
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Note: The local label referenced by the "3b" below is emitted by
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the tablejump insn. */
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#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
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fprintf (FILE, TARGET_AS100_SYNTAX \
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? "\t.LWORD L%d - ?-\n" : "\t.long .L%d - 1b\n", VALUE)
|
||
|
||
#define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
|
||
do \
|
||
{ \
|
||
HOST_WIDE_INT size_ = (SIZE); \
|
||
\
|
||
/* The as100 assembler does not have an equivalent of the SVR4 \
|
||
.size pseudo-op. */ \
|
||
if (TARGET_AS100_SYNTAX) \
|
||
break; \
|
||
\
|
||
fputs (SIZE_ASM_OP, STREAM); \
|
||
assemble_name (STREAM, NAME); \
|
||
fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_); \
|
||
} \
|
||
while (0)
|
||
|
||
#define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME) \
|
||
do \
|
||
{ \
|
||
/* The as100 assembler does not have an equivalent of the SVR4 \
|
||
.size pseudo-op. */ \
|
||
if (TARGET_AS100_SYNTAX) \
|
||
break; \
|
||
fputs (SIZE_ASM_OP, STREAM); \
|
||
assemble_name (STREAM, NAME); \
|
||
fputs (", .-", STREAM); \
|
||
assemble_name (STREAM, NAME); \
|
||
putc ('\n', STREAM); \
|
||
} \
|
||
while (0)
|
||
|
||
#define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE) \
|
||
do \
|
||
{ \
|
||
/* The as100 assembler does not have an equivalent of the SVR4 \
|
||
.size pseudo-op. */ \
|
||
if (TARGET_AS100_SYNTAX) \
|
||
break; \
|
||
fputs (TYPE_ASM_OP, STREAM); \
|
||
assemble_name (STREAM, NAME); \
|
||
fputs (", ", STREAM); \
|
||
fprintf (STREAM, TYPE_OPERAND_FMT, TYPE); \
|
||
putc ('\n', STREAM); \
|
||
} \
|
||
while (0)
|
||
|
||
#undef ASM_GENERATE_INTERNAL_LABEL
|
||
#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
|
||
do \
|
||
{ \
|
||
sprintf (LABEL, TARGET_AS100_SYNTAX ? "*%s%u" : "*.%s%u", \
|
||
PREFIX, (unsigned) (NUM)); \
|
||
} \
|
||
while (0)
|
||
|
||
#undef ASM_OUTPUT_EXTERNAL
|
||
#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
|
||
do \
|
||
{ \
|
||
if (TARGET_AS100_SYNTAX) \
|
||
targetm.asm_out.globalize_label (FILE, NAME); \
|
||
default_elf_asm_output_external (FILE, DECL, NAME); \
|
||
} \
|
||
while (0)
|
||
|
||
#undef ASM_OUTPUT_ALIGNED_COMMON
|
||
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
|
||
do \
|
||
{ \
|
||
if (TARGET_AS100_SYNTAX) \
|
||
{ \
|
||
fprintf ((FILE), "\t.GLB\t"); \
|
||
assemble_name ((FILE), (NAME)); \
|
||
fprintf ((FILE), "\n"); \
|
||
assemble_name ((FILE), (NAME)); \
|
||
switch ((ALIGN) / BITS_PER_UNIT) \
|
||
{ \
|
||
case 4: \
|
||
fprintf ((FILE), ":\t.BLKL\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
|
||
(SIZE) / 4); \
|
||
break; \
|
||
case 2: \
|
||
fprintf ((FILE), ":\t.BLKW\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
|
||
(SIZE) / 2); \
|
||
break; \
|
||
default: \
|
||
fprintf ((FILE), ":\t.BLKB\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
|
||
(SIZE)); \
|
||
break; \
|
||
} \
|
||
} \
|
||
else \
|
||
{ \
|
||
fprintf ((FILE), "%s", COMMON_ASM_OP); \
|
||
assemble_name ((FILE), (NAME)); \
|
||
fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
|
||
(SIZE), (ALIGN) / BITS_PER_UNIT); \
|
||
} \
|
||
} \
|
||
while (0)
|
||
|
||
#undef SKIP_ASM_OP
|
||
#define SKIP_ASM_OP (TARGET_AS100_SYNTAX ? "\t.BLKB\t" : "\t.zero\t")
|
||
|
||
#undef ASM_OUTPUT_LIMITED_STRING
|
||
#define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
|
||
do \
|
||
{ \
|
||
const unsigned char *_limited_str = \
|
||
(const unsigned char *) (STR); \
|
||
unsigned ch; \
|
||
\
|
||
fprintf ((FILE), TARGET_AS100_SYNTAX \
|
||
? "\t.BYTE\t\"" : "\t.string\t\""); \
|
||
\
|
||
for (; (ch = *_limited_str); _limited_str++) \
|
||
{ \
|
||
int escape; \
|
||
\
|
||
switch (escape = ESCAPES[ch]) \
|
||
{ \
|
||
case 0: \
|
||
putc (ch, (FILE)); \
|
||
break; \
|
||
case 1: \
|
||
fprintf ((FILE), "\\%03o", ch); \
|
||
break; \
|
||
default: \
|
||
putc ('\\', (FILE)); \
|
||
putc (escape, (FILE)); \
|
||
break; \
|
||
} \
|
||
} \
|
||
\
|
||
fprintf ((FILE), TARGET_AS100_SYNTAX ? "\"\n\t.BYTE\t0\n" : "\"\n");\
|
||
} \
|
||
while (0)
|
||
|
||
#undef IDENT_ASM_OP
|
||
#define IDENT_ASM_OP (TARGET_AS100_SYNTAX \
|
||
? "\t.END\t; Built by: ": "\t.ident\t")
|
||
|
||
/* For PIC put jump tables into the text section so that the offsets that
|
||
they contain are always computed between two same-section symbols. */
|
||
#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
|
||
|
||
#define PRINT_OPERAND(FILE, X, CODE) \
|
||
rx_print_operand (FILE, X, CODE)
|
||
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
|
||
rx_print_operand_address (FILE, ADDR)
|
||
|
||
#define CC_NO_CARRY 0400
|
||
#define NOTICE_UPDATE_CC(EXP, INSN) rx_notice_update_cc (EXP, INSN)
|
||
|
||
extern int rx_float_compare_mode;
|
||
|
||
/* This is a version of REG_P that also returns TRUE for SUBREGs. */
|
||
#define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
|
||
|
||
/* Like REG_P except that this macro is true for SET expressions. */
|
||
#define SET_P(rtl) (GET_CODE (rtl) == SET)
|
||
|
||
#define CAN_DEBUG_WITHOUT_FP 1
|
||
|
||
/* The AS100 assembler does not support .leb128 and .uleb128, but
|
||
the compiler-build-time configure tests will have enabled their
|
||
use because GAS supports them. So default to generating STABS
|
||
debug information instead of DWARF2 when generating AS100
|
||
compatible output. */
|
||
#undef PREFERRED_DEBUGGING_TYPE
|
||
#define PREFERRED_DEBUGGING_TYPE (TARGET_AS100_SYNTAX \
|
||
? DBX_DEBUG : DWARF2_DEBUG)
|
||
|
||
#define INCOMING_FRAME_SP_OFFSET 4
|
||
#define ARG_POINTER_CFA_OFFSET(FNDECL) 4
|
||
#define FRAME_POINTER_CFA_OFFSET(FNDECL) 4
|
||
|
||
/* Translate -nofpu into -mnofpu so that it gets passed from gcc to cc1. */
|
||
#define TARGET_OPTION_TRANSLATE_TABLE \
|
||
{"-nofpu", "-mnofpu" }
|
||
|
||
#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
|
||
rx_set_optimization_options ()
|
||
|
||
#define TARGET_USE_FPU (! TARGET_NO_USE_FPU)
|
||
|
||
/* This macro is used to decide when RX FPU instructions can be used. */
|
||
#define ALLOW_RX_FPU_INSNS (TARGET_USE_FPU)
|