500 lines
15 KiB
C
500 lines
15 KiB
C
/* Definitions of target machine for GNU compiler, for CRX.
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Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
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2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
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Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#ifndef GCC_CRX_H
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#define GCC_CRX_H
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/*****************************************************************************/
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/* CONTROLLING THE DRIVER */
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/*****************************************************************************/
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#define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
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%{!fenforce-eh-specs:-fno-enforce-eh-specs} \
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%{!fexceptions:-fno-exceptions} \
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%{!fthreadsafe-statics:-fno-threadsafe-statics}"
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#undef STARTFILE_SPEC
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#define STARTFILE_SPEC "crti.o%s crtbegin.o%s"
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#undef ENDFILE_SPEC
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#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
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#undef MATH_LIBRARY
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#define MATH_LIBRARY ""
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/*****************************************************************************/
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/* RUN-TIME TARGET SPECIFICATION */
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/*****************************************************************************/
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#ifndef TARGET_CPU_CPP_BUILTINS
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#define TARGET_CPU_CPP_BUILTINS() \
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do { \
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builtin_define("__CRX__"); \
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builtin_define("__CR__"); \
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} while (0)
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#endif
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#define TARGET_VERSION fputs (" (CRX/ELF)", stderr);
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/* Put each function in its own section so that PAGE-instruction
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* relaxation can do its best. */
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#define OPTIMIZATION_OPTIONS(LEVEL, SIZEFLAG) \
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do { \
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if ((LEVEL) || (SIZEFLAG)) \
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flag_function_sections = 1; \
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} while (0)
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/* Show we can debug even without a frame pointer. */
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#define CAN_DEBUG_WITHOUT_FP
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/*****************************************************************************/
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/* STORAGE LAYOUT */
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/*****************************************************************************/
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#define BITS_BIG_ENDIAN 0
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#define BYTES_BIG_ENDIAN 0
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#define WORDS_BIG_ENDIAN 0
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#define UNITS_PER_WORD 4
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#define POINTER_SIZE 32
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#define PARM_BOUNDARY 32
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#define STACK_BOUNDARY 32
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#define FUNCTION_BOUNDARY 32
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#define STRUCTURE_SIZE_BOUNDARY 32
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#define BIGGEST_ALIGNMENT 32
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/* In CRX arrays of chars are word-aligned, so strcpy() will be faster. */
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#define DATA_ALIGNMENT(TYPE, ALIGN) \
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(TREE_CODE (TYPE) == ARRAY_TYPE && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
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&& (ALIGN) < BITS_PER_WORD \
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? (BITS_PER_WORD) : (ALIGN))
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/* In CRX strings are word-aligned so strcpy from constants will be faster. */
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#define CONSTANT_ALIGNMENT(CONSTANT, ALIGN) \
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(TREE_CODE (CONSTANT) == STRING_CST && (ALIGN) < BITS_PER_WORD \
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? (BITS_PER_WORD) : (ALIGN))
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#define STRICT_ALIGNMENT 0
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#define PCC_BITFIELD_TYPE_MATTERS 1
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/*****************************************************************************/
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/* LAYOUT OF SOURCE LANGUAGE DATA TYPES */
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/*****************************************************************************/
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#define INT_TYPE_SIZE 32
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#define SHORT_TYPE_SIZE 16
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#define LONG_TYPE_SIZE 32
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#define LONG_LONG_TYPE_SIZE 64
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#define FLOAT_TYPE_SIZE 32
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#define DOUBLE_TYPE_SIZE 64
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#define LONG_DOUBLE_TYPE_SIZE 64
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#define DEFAULT_SIGNED_CHAR 1
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#define SIZE_TYPE "unsigned int"
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#define PTRDIFF_TYPE "int"
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/*****************************************************************************/
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/* REGISTER USAGE. */
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/*****************************************************************************/
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#define FIRST_PSEUDO_REGISTER 19
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/* On the CRX, only the stack pointer (r15) is such. */
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#define FIXED_REGISTERS \
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{ \
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/* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 */ \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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/* r11 r12 r13 ra sp r16 r17 cc */ \
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0, 0, 0, 0, 1, 0, 0, 1 \
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}
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/* On the CRX, calls clobbers r0-r6 (scratch registers), ra (the return address)
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* and sp - (the stack pointer which is fixed). */
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#define CALL_USED_REGISTERS \
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{ \
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/* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 */ \
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1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \
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/* r11 r12 r13 ra sp r16 r17 cc */ \
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0, 0, 0, 1, 1, 1, 1, 1 \
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}
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#define HARD_REGNO_NREGS(REGNO, MODE) \
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((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
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/* On the CRX architecture, HILO regs can only hold SI mode. */
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#define HARD_REGNO_MODE_OK(REGNO, MODE) crx_hard_regno_mode_ok(REGNO, MODE)
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/* So far no patterns for moving CCMODE data are available */
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#define AVOID_CCMODE_COPIES
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/* Interrupt functions can only use registers that have already been saved by
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* the prologue, even if they would normally be call-clobbered. */
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#define HARD_REGNO_RENAME_OK(SRC, DEST) \
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(!crx_interrupt_function_p () || df_regs_ever_live_p (DEST))
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#define MODES_TIEABLE_P(MODE1, MODE2) 1
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enum reg_class
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{
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NO_REGS,
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LO_REGS,
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HI_REGS,
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HILO_REGS,
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NOSP_REGS,
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GENERAL_REGS,
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ALL_REGS,
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LIM_REG_CLASSES
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};
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#define N_REG_CLASSES (int) LIM_REG_CLASSES
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/* The following macro defines cover classes for Integrated Register
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Allocator. Cover classes is a set of non-intersected register
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classes covering all hard registers used for register allocation
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purpose. Any move between two registers of a cover class should be
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cheaper than load or store of the registers. The macro value is
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array of register classes with LIM_REG_CLASSES used as the end
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marker. */
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#define IRA_COVER_CLASSES \
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{ \
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GENERAL_REGS, LIM_REG_CLASSES \
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}
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#define REG_CLASS_NAMES \
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{ \
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"NO_REGS", \
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"LO_REGS", \
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"HI_REGS", \
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"HILO_REGS", \
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"NOSP_REGS", \
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"GENERAL_REGS", \
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"ALL_REGS" \
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}
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#define REG_CLASS_CONTENTS \
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{ \
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{0x00000000}, /* NO_REGS */ \
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{0x00010000}, /* LO_REGS : 16 */ \
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{0x00020000}, /* HI_REGS : 17 */ \
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{0x00030000}, /* HILO_REGS : 16, 17 */ \
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{0x00007fff}, /* NOSP_REGS : 0 - 14 */ \
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{0x0000ffff}, /* GENERAL_REGS : 0 - 15 */ \
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{0x0007ffff} /* ALL_REGS : 0 - 18 */ \
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}
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#define REGNO_REG_CLASS(REGNO) crx_regno_reg_class(REGNO)
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#define BASE_REG_CLASS GENERAL_REGS
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#define INDEX_REG_CLASS GENERAL_REGS
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#define REG_CLASS_FROM_LETTER(C) \
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((C) == 'b' ? NOSP_REGS : \
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(C) == 'l' ? LO_REGS : \
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(C) == 'h' ? HI_REGS : \
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(C) == 'k' ? HILO_REGS : \
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NO_REGS)
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#define REGNO_OK_FOR_BASE_P(REGNO) \
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((REGNO) < 16 \
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|| (reg_renumber && (unsigned)reg_renumber[REGNO] < 16))
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#define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)
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#define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
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#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
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crx_secondary_reload_class (CLASS, MODE, X)
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#define CLASS_MAX_NREGS(CLASS, MODE) \
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(GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD
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#define SIGNED_INT_FITS_N_BITS(imm, N) \
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((((imm) < ((long long)1<<((N)-1))) && ((imm) >= -((long long)1<<((N)-1)))) ? 1 : 0)
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#define UNSIGNED_INT_FITS_N_BITS(imm, N) \
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(((imm) < ((long long)1<<(N)) && (imm) >= (long long)0) ? 1 : 0)
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#define HILO_REGNO_P(regno) \
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(reg_classes_intersect_p(REGNO_REG_CLASS(regno), HILO_REGS))
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#define INT_CST4(VALUE) \
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(((VALUE) >= -1 && (VALUE) <= 4) || (VALUE) == -4 \
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|| (VALUE) == 7 || (VALUE) == 8 || (VALUE) == 16 || (VALUE) == 32 \
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|| (VALUE) == 20 || (VALUE) == 12 || (VALUE) == 48)
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#define CONST_OK_FOR_LETTER_P(VALUE, C) \
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/* Legal const for store immediate instructions */ \
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((C) == 'I' ? UNSIGNED_INT_FITS_N_BITS(VALUE, 3) : \
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(C) == 'J' ? UNSIGNED_INT_FITS_N_BITS(VALUE, 4) : \
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(C) == 'K' ? UNSIGNED_INT_FITS_N_BITS(VALUE, 5) : \
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(C) == 'L' ? INT_CST4(VALUE) : \
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0)
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#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
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((C) == 'G' ? crx_const_double_ok (VALUE) : \
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0)
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/*****************************************************************************/
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/* STACK LAYOUT AND CALLING CONVENTIONS. */
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/*****************************************************************************/
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#define STACK_GROWS_DOWNWARD
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#define STARTING_FRAME_OFFSET 0
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#define STACK_POINTER_REGNUM 15
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#define FRAME_POINTER_REGNUM 13
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#define ARG_POINTER_REGNUM 12
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#define STATIC_CHAIN_REGNUM 1
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#define RETURN_ADDRESS_REGNUM 14
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#define FIRST_PARM_OFFSET(FNDECL) 0
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#define ELIMINABLE_REGS \
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{ \
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{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
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{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
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{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
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}
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#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
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do { \
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(OFFSET) = crx_initial_elimination_offset ((FROM), (TO)); \
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} while (0)
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/*****************************************************************************/
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/* PASSING FUNCTION ARGUMENTS */
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/*****************************************************************************/
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#define ACCUMULATE_OUTGOING_ARGS (TARGET_NO_PUSH_ARGS)
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#define PUSH_ARGS (!TARGET_NO_PUSH_ARGS)
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#define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3)
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#define RETURN_POPS_ARGS(FNDECL, FUNTYPE, SIZE) 0
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#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
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((rtx) crx_function_arg(&(CUM), (MODE), (TYPE), (NAMED)))
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#ifndef CUMULATIVE_ARGS
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struct cumulative_args
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{
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int ints;
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};
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#define CUMULATIVE_ARGS struct cumulative_args
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#endif
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/* On the CRX architecture, Varargs routines should receive their parameters on
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* the stack. */
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#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
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crx_init_cumulative_args(&(CUM), (FNTYPE), (LIBNAME))
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#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
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crx_function_arg_advance(&(CUM), (MODE), (TYPE), (NAMED))
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#define FUNCTION_ARG_REGNO_P(REGNO) crx_function_arg_regno_p(REGNO)
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/*****************************************************************************/
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/* RETURNING FUNCTION VALUE */
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/*****************************************************************************/
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/* On the CRX, the return value is in R0 */
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#define FUNCTION_VALUE(VALTYPE, FUNC) \
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gen_rtx_REG(TYPE_MODE (VALTYPE), 0)
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#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
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#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
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#define CRX_STRUCT_VALUE_REGNUM 0
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/*****************************************************************************/
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/* GENERATING CODE FOR PROFILING - NOT IMPLEMENTED */
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/*****************************************************************************/
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#undef FUNCTION_PROFILER
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#define FUNCTION_PROFILER(STREAM, LABELNO) \
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{ \
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sorry ("Profiler support for CRX"); \
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}
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/*****************************************************************************/
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/* TRAMPOLINES FOR NESTED FUNCTIONS - NOT SUPPORTED */
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/*****************************************************************************/
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#define TRAMPOLINE_SIZE 32
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/*****************************************************************************/
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/* ADDRESSING MODES */
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/*****************************************************************************/
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#define CONSTANT_ADDRESS_P(X) \
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(GET_CODE (X) == LABEL_REF \
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|| GET_CODE (X) == SYMBOL_REF \
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|| GET_CODE (X) == CONST \
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|| GET_CODE (X) == CONST_INT)
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#define MAX_REGS_PER_ADDRESS 2
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#define HAVE_POST_INCREMENT 1
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#define HAVE_POST_DECREMENT 1
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#define HAVE_POST_MODIFY_DISP 1
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#define HAVE_POST_MODIFY_REG 0
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#ifdef REG_OK_STRICT
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#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
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#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
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#else
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#define REG_OK_FOR_BASE_P(X) 1
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#define REG_OK_FOR_INDEX_P(X) 1
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#endif /* REG_OK_STRICT */
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#define LEGITIMATE_CONSTANT_P(X) 1
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/*****************************************************************************/
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/* CONDITION CODE STATUS */
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/*****************************************************************************/
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/*****************************************************************************/
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/* RELATIVE COSTS OF OPERATIONS */
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/*****************************************************************************/
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#define MEMORY_MOVE_COST(MODE, CLASS, IN) crx_memory_move_cost(MODE, CLASS, IN)
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/* Moving to processor register flushes pipeline - thus asymmetric */
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#define REGISTER_MOVE_COST(MODE, FROM, TO) ((TO != GENERAL_REGS) ? 8 : 2)
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/* Assume best case (branch predicted) */
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#define BRANCH_COST(speed_p, predictable_p) 2
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#define SLOW_BYTE_ACCESS 1
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/*****************************************************************************/
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/* DIVIDING THE OUTPUT INTO SECTIONS */
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/*****************************************************************************/
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#define TEXT_SECTION_ASM_OP "\t.section\t.text"
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#define DATA_SECTION_ASM_OP "\t.section\t.data"
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#define BSS_SECTION_ASM_OP "\t.section\t.bss"
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/*****************************************************************************/
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/* POSITION INDEPENDENT CODE */
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/*****************************************************************************/
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#define PIC_OFFSET_TABLE_REGNUM 12
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#define LEGITIMATE_PIC_OPERAND_P(X) 1
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/*****************************************************************************/
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/* ASSEMBLER FORMAT */
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/*****************************************************************************/
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#define GLOBAL_ASM_OP "\t.globl\t"
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#undef USER_LABEL_PREFIX
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#define USER_LABEL_PREFIX "_"
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#undef ASM_OUTPUT_LABELREF
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#define ASM_OUTPUT_LABELREF(STREAM, NAME) \
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asm_fprintf (STREAM, "%U%s", (*targetm.strip_name_encoding) (NAME));
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#undef ASM_APP_ON
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#define ASM_APP_ON "#APP\n"
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#undef ASM_APP_OFF
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#define ASM_APP_OFF "#NO_APP\n"
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/*****************************************************************************/
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/* INSTRUCTION OUTPUT */
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/*****************************************************************************/
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#define REGISTER_NAMES \
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{ \
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
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"r8", "r9", "r10", "r11", "r12", "r13", "ra", "sp", \
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"lo", "hi", "cc" \
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}
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#define PRINT_OPERAND(STREAM, X, CODE) \
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crx_print_operand(STREAM, X, CODE)
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#define PRINT_OPERAND_ADDRESS(STREAM, ADDR) \
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crx_print_operand_address(STREAM, ADDR)
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/*****************************************************************************/
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/* OUTPUT OF DISPATCH TABLES */
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/*****************************************************************************/
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#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
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asm_fprintf ((STREAM), "\t.long\t.L%d\n", (VALUE))
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/*****************************************************************************/
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/* ALIGNMENT IN ASSEMBLER FILE */
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/*****************************************************************************/
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#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
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asm_fprintf ((STREAM), "\t.align\t%d\n", 1 << (POWER))
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/*****************************************************************************/
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/* MISCELLANEOUS PARAMETERS */
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/*****************************************************************************/
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#define CASE_VECTOR_MODE Pmode
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#define MOVE_MAX 4
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#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
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#define STORE_FLAG_VALUE 1
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#define Pmode SImode
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#define FUNCTION_MODE QImode
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#endif /* ! GCC_CRX_H */
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