1014 lines
34 KiB
C++
1014 lines
34 KiB
C++
/* Definitions of target machine for GNU compiler, for the pdp-11
|
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Copyright (C) 1994, 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2004, 2005,
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2006, 2007, 2008 Free Software Foundation, Inc.
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Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at).
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#define CONSTANT_POOL_BEFORE_FUNCTION 0
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/* check whether load_fpu_reg or not */
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#define LOAD_FPU_REG_P(x) ((x)>=8 && (x)<=11)
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#define NO_LOAD_FPU_REG_P(x) ((x)==12 || (x)==13)
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#define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x))
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#define CPU_REG_P(x) ((x)<8)
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/* Names to predefine in the preprocessor for this target machine. */
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#define TARGET_CPU_CPP_BUILTINS() \
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do \
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{ \
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builtin_define_std ("pdp11"); \
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} \
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while (0)
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/* Print subsidiary information on the compiler version in use. */
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#define TARGET_VERSION fprintf (stderr, " (pdp11)");
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/* Generate DBX debugging information. */
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/* #define DBX_DEBUGGING_INFO */
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#define TARGET_40_PLUS (TARGET_40 || TARGET_45)
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#define TARGET_10 (! TARGET_40_PLUS)
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#define TARGET_UNIX_ASM_DEFAULT 0
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#define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0)
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/* TYPE SIZES */
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#define SHORT_TYPE_SIZE 16
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#define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32)
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#define LONG_TYPE_SIZE 32
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#define LONG_LONG_TYPE_SIZE 64
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/* if we set FLOAT_TYPE_SIZE to 32, we could have the benefit
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of saving core for huge arrays - the definitions are
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already in md - but floats can never reside in
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an FPU register - we keep the FPU in double float mode
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all the time !! */
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#define FLOAT_TYPE_SIZE (TARGET_FLOAT32 ? 32 : 64)
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#define DOUBLE_TYPE_SIZE 64
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#define LONG_DOUBLE_TYPE_SIZE 64
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/* machine types from ansi */
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#define SIZE_TYPE "unsigned int" /* definition of size_t */
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#define WCHAR_TYPE "int" /* or long int???? */
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#define WCHAR_TYPE_SIZE 16
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#define PTRDIFF_TYPE "int"
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/* target machine storage layout */
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/* Define this if most significant bit is lowest numbered
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in instructions that operate on numbered bit-fields. */
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#define BITS_BIG_ENDIAN 0
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/* Define this if most significant byte of a word is the lowest numbered. */
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#define BYTES_BIG_ENDIAN 0
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/* Define this if most significant word of a multiword number is first. */
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#define WORDS_BIG_ENDIAN 1
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/* Define that floats are in VAX order, not high word first as for ints. */
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#define FLOAT_WORDS_BIG_ENDIAN 0
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/* Width of a word, in units (bytes).
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UNITS OR BYTES - seems like units */
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#define UNITS_PER_WORD 2
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/* This machine doesn't use IEEE floats. */
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/* Because the pdp11 (at least Unix) convention for 32-bit ints is
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big endian, opposite for what you need for float, the vax float
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conversion routines aren't actually used directly. But the underlying
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format is indeed the vax/pdp11 float format. */
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extern const struct real_format pdp11_f_format;
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extern const struct real_format pdp11_d_format;
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/* Maximum sized of reasonable data type
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DImode or Dfmode ...*/
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#define MAX_FIXED_MODE_SIZE 64
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/* Allocation boundary (in *bits*) for storing pointers in memory. */
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#define POINTER_BOUNDARY 16
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/* Allocation boundary (in *bits*) for storing arguments in argument list. */
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#define PARM_BOUNDARY 16
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/* Boundary (in *bits*) on which stack pointer should be aligned. */
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#define STACK_BOUNDARY 16
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/* Allocation boundary (in *bits*) for the code of a function. */
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#define FUNCTION_BOUNDARY 16
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/* Alignment of field after `int : 0' in a structure. */
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#define EMPTY_FIELD_BOUNDARY 16
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/* No data type wants to be aligned rounder than this. */
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#define BIGGEST_ALIGNMENT 16
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/* Define this if move instructions will actually fail to work
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when given unaligned data. */
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#define STRICT_ALIGNMENT 1
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/* Standard register usage. */
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/* Number of actual hardware registers.
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The hardware registers are assigned numbers for the compiler
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from 0 to just below FIRST_PSEUDO_REGISTER.
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All registers that the compiler knows about must be given numbers,
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even those that are not normally considered general registers.
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we have 8 integer registers, plus 6 float
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(don't use scratch float !) */
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#define FIRST_PSEUDO_REGISTER 14
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/* 1 for registers that have pervasive standard uses
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and are not available for the register allocator.
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On the pdp, these are:
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Reg 7 = pc;
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reg 6 = sp;
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reg 5 = fp; not necessarily!
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*/
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/* don't let them touch fp regs for the time being !*/
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#define FIXED_REGISTERS \
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{0, 0, 0, 0, 0, 0, 1, 1, \
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0, 0, 0, 0, 0, 0 }
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/* 1 for registers not available across function calls.
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These must include the FIXED_REGISTERS and also any
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registers that can be used without being saved.
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The latter must include the registers where values are returned
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and the register where structure-value addresses are passed.
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Aside from that, you can include as many other registers as you like. */
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/* don't know about fp */
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#define CALL_USED_REGISTERS \
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{1, 1, 0, 0, 0, 0, 1, 1, \
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0, 0, 0, 0, 0, 0 }
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/* Make sure everything's fine if we *don't* have an FPU.
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This assumes that putting a register in fixed_regs will keep the
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compiler's mitts completely off it. We don't bother to zero it out
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of register classes. Also fix incompatible register naming with
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the UNIX assembler.
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*/
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#define CONDITIONAL_REGISTER_USAGE \
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{ \
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int i; \
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HARD_REG_SET x; \
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if (!TARGET_FPU) \
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{ \
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COPY_HARD_REG_SET (x, reg_class_contents[(int)FPU_REGS]); \
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
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if (TEST_HARD_REG_BIT (x, i)) \
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fixed_regs[i] = call_used_regs[i] = 1; \
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} \
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\
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if (TARGET_AC0) \
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call_used_regs[8] = 1; \
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if (TARGET_UNIX_ASM) \
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{ \
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/* Change names of FPU registers for the UNIX assembler. */ \
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reg_names[8] = "fr0"; \
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reg_names[9] = "fr1"; \
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reg_names[10] = "fr2"; \
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reg_names[11] = "fr3"; \
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reg_names[12] = "fr4"; \
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reg_names[13] = "fr5"; \
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} \
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}
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/* Return number of consecutive hard regs needed starting at reg REGNO
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to hold something of mode MODE.
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This is ordinarily the length in words of a value of mode MODE
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but can be less for certain modes in special long registers.
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*/
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#define HARD_REGNO_NREGS(REGNO, MODE) \
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((REGNO < 8)? \
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((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
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:1)
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/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
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On the pdp, the cpu registers can hold any mode - check alignment
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FPU can only hold DF - simplifies life!
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*/
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#define HARD_REGNO_MODE_OK(REGNO, MODE) \
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(((REGNO) < 8)? \
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((GET_MODE_BITSIZE(MODE) <= 16) \
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|| (GET_MODE_BITSIZE(MODE) == 32 && !((REGNO) & 1))) \
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:(MODE) == DFmode)
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/* Value is 1 if it is a good idea to tie two pseudo registers
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when one has mode MODE1 and one has mode MODE2.
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If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
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for any hard reg, then this must be 0 for correct output. */
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#define MODES_TIEABLE_P(MODE1, MODE2) 0
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/* Specify the registers used for certain standard purposes.
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The values of these macros are register numbers. */
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/* the pdp11 pc overloaded on a register that the compiler knows about. */
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#define PC_REGNUM 7
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/* Register to use for pushing function arguments. */
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#define STACK_POINTER_REGNUM 6
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/* Base register for access to local variables of the function. */
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#define FRAME_POINTER_REGNUM 5
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/* Base register for access to arguments of the function. */
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#define ARG_POINTER_REGNUM 5
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/* Register in which static-chain is passed to a function. */
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/* ??? - i don't want to give up a reg for this! */
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#define STATIC_CHAIN_REGNUM 4
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/* Define the classes of registers for register constraints in the
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machine description. Also define ranges of constants.
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One of the classes must always be named ALL_REGS and include all hard regs.
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If there is more than one class, another class must be named NO_REGS
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and contain no registers.
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The name GENERAL_REGS must be the name of a class (or an alias for
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another name such as ALL_REGS). This is the class of registers
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that is allowed by "g" or "r" in a register constraint.
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Also, registers outside this class are allocated only when
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instructions express preferences for them.
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The classes must be numbered in nondecreasing order; that is,
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a larger-numbered class must never be contained completely
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in a smaller-numbered class.
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For any two classes, it is very desirable that there be another
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class that represents their union. */
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/* The pdp has a couple of classes:
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MUL_REGS are used for odd numbered regs, to use in 16-bit multiplication
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(even numbered do 32-bit multiply)
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LMUL_REGS long multiply registers (even numbered regs )
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(don't need them, all 32-bit regs are even numbered!)
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GENERAL_REGS is all cpu
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LOAD_FPU_REGS is the first four cpu regs, they are easier to load
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NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them
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FPU_REGS is all fpu regs
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*/
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enum reg_class { NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES };
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#define N_REG_CLASSES (int) LIM_REG_CLASSES
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/* have to allow this till cmpsi/tstsi are fixed in a better way !! */
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#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
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/* Since GENERAL_REGS is the same class as ALL_REGS,
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don't give it a different class number; just make it an alias. */
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/* #define GENERAL_REGS ALL_REGS */
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/* Give names of register classes as strings for dump file. */
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#define REG_CLASS_NAMES {"NO_REGS", "MUL_REGS", "GENERAL_REGS", "LOAD_FPU_REGS", "NO_LOAD_FPU_REGS", "FPU_REGS", "ALL_REGS" }
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/* Define which registers fit in which classes.
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This is an initializer for a vector of HARD_REG_SET
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of length N_REG_CLASSES. */
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#define REG_CLASS_CONTENTS {{0}, {0x00aa}, {0x00ff}, {0x0f00}, {0x3000}, {0x3f00}, {0x3fff}}
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/* The same information, inverted:
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Return the class number of the smallest class containing
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reg number REGNO. This could be a conditional expression
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or could index an array. */
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#define REGNO_REG_CLASS(REGNO) \
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((REGNO)>=8?((REGNO)<=11?LOAD_FPU_REGS:NO_LOAD_FPU_REGS):(((REGNO)&1)?MUL_REGS:GENERAL_REGS))
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/* The class value for index registers, and the one for base regs. */
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#define INDEX_REG_CLASS GENERAL_REGS
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#define BASE_REG_CLASS GENERAL_REGS
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/* Get reg_class from a letter such as appears in the machine description. */
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#define REG_CLASS_FROM_LETTER(C) \
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((C) == 'f' ? FPU_REGS : \
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((C) == 'd' ? MUL_REGS : \
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((C) == 'a' ? LOAD_FPU_REGS : NO_REGS)))
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/* The letters I, J, K, L and M in a register constraint string
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can be used to stand for particular ranges of immediate operands.
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This macro defines what the ranges are.
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C is the letter, and VALUE is a constant value.
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Return 1 if VALUE is in the range specified by C.
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I bits 31-16 0000
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J bits 15-00 0000
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K completely random 32 bit
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L,M,N -1,1,0 respectively
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O where doing shifts in sequence is faster than
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one big shift
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*/
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#define CONST_OK_FOR_LETTER_P(VALUE, C) \
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((C) == 'I' ? ((VALUE) & 0xffff0000) == 0 \
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: (C) == 'J' ? ((VALUE) & 0x0000ffff) == 0 \
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: (C) == 'K' ? (((VALUE) & 0xffff0000) != 0 \
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&& ((VALUE) & 0x0000ffff) != 0) \
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: (C) == 'L' ? ((VALUE) == 1) \
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: (C) == 'M' ? ((VALUE) == -1) \
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: (C) == 'N' ? ((VALUE) == 0) \
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: (C) == 'O' ? (abs(VALUE) >1 && abs(VALUE) <= 4) \
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: 0)
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/* Similar, but for floating constants, and defining letters G and H.
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Here VALUE is the CONST_DOUBLE rtx itself. */
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#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
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((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
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/* Letters in the range `Q' through `U' may be defined in a
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machine-dependent fashion to stand for arbitrary operand types.
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The machine description macro `EXTRA_CONSTRAINT' is passed the
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operand as its first argument and the constraint letter as its
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second operand.
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`Q' is for memory references that require an extra word after the opcode.
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`R' is for memory references which are encoded within the opcode. */
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#define EXTRA_CONSTRAINT(OP,CODE) \
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((GET_CODE (OP) != MEM) ? 0 \
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: !memory_address_p (GET_MODE (OP), XEXP (OP, 0)) ? 0 \
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: ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \
|
||
: ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \
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: 0)
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||
|
||
/* Given an rtx X being reloaded into a reg required to be
|
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in class CLASS, return the class of reg to actually use.
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In general this is just CLASS; but on some machines
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in some cases it is preferable to use a more restrictive class.
|
||
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loading is easier into LOAD_FPU_REGS than FPU_REGS! */
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||
|
||
#define PREFERRED_RELOAD_CLASS(X,CLASS) \
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(((CLASS) != FPU_REGS)?(CLASS):LOAD_FPU_REGS)
|
||
|
||
#define SECONDARY_RELOAD_CLASS(CLASS,MODE,x) \
|
||
(((CLASS) == NO_LOAD_FPU_REGS && !(REG_P(x) && LOAD_FPU_REG_P(REGNO(x))))?LOAD_FPU_REGS:NO_REGS)
|
||
|
||
/* Return the maximum number of consecutive registers
|
||
needed to represent mode MODE in a register of class CLASS. */
|
||
#define CLASS_MAX_NREGS(CLASS, MODE) \
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((CLASS == GENERAL_REGS || CLASS == MUL_REGS)? \
|
||
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \
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1 \
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||
)
|
||
|
||
|
||
/* Stack layout; function entry, exit and calling. */
|
||
|
||
/* Define this if pushing a word on the stack
|
||
makes the stack pointer a smaller address. */
|
||
#define STACK_GROWS_DOWNWARD
|
||
|
||
/* Define this to nonzero if the nominal address of the stack frame
|
||
is at the high-address end of the local variables;
|
||
that is, each additional local variable allocated
|
||
goes at a more negative offset in the frame.
|
||
*/
|
||
#define FRAME_GROWS_DOWNWARD 1
|
||
|
||
/* Offset within stack frame to start allocating local variables at.
|
||
If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
|
||
first local allocated. Otherwise, it is the offset to the BEGINNING
|
||
of the first local allocated. */
|
||
#define STARTING_FRAME_OFFSET 0
|
||
|
||
/* If we generate an insn to push BYTES bytes,
|
||
this says how many the stack pointer really advances by.
|
||
On the pdp11, the stack is on an even boundary */
|
||
#define PUSH_ROUNDING(BYTES) ((BYTES + 1) & ~1)
|
||
|
||
/* current_first_parm_offset stores the # of registers pushed on the
|
||
stack */
|
||
extern int current_first_parm_offset;
|
||
|
||
/* Offset of first parameter from the argument pointer register value.
|
||
For the pdp11, this is nonzero to account for the return address.
|
||
1 - return address
|
||
2 - frame pointer (always saved, even when not used!!!!)
|
||
-- change some day !!!:q!
|
||
|
||
*/
|
||
#define FIRST_PARM_OFFSET(FNDECL) 4
|
||
|
||
/* Value is 1 if returning from a function call automatically
|
||
pops the arguments described by the number-of-args field in the call.
|
||
FUNDECL is the declaration node of the function (as a tree),
|
||
FUNTYPE is the data type of the function (as a tree),
|
||
or for a library call it is an identifier node for the subroutine name. */
|
||
|
||
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
|
||
|
||
/* Define how to find the value returned by a function.
|
||
VALTYPE is the data type of the value (as a tree).
|
||
If the precise function being called is known, FUNC is its FUNCTION_DECL;
|
||
otherwise, FUNC is 0. */
|
||
#define BASE_RETURN_VALUE_REG(MODE) \
|
||
((MODE) == DFmode ? 8 : 0)
|
||
|
||
/* On the pdp11 the value is found in R0 (or ac0???
|
||
not without FPU!!!! ) */
|
||
|
||
#define FUNCTION_VALUE(VALTYPE, FUNC) \
|
||
gen_rtx_REG (TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE)))
|
||
|
||
/* and the called function leaves it in the first register.
|
||
Difference only on machines with register windows. */
|
||
|
||
#define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
|
||
gen_rtx_REG (TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE)))
|
||
|
||
/* Define how to find the value returned by a library function
|
||
assuming the value has mode MODE. */
|
||
|
||
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, BASE_RETURN_VALUE_REG(MODE))
|
||
|
||
/* 1 if N is a possible register number for a function value
|
||
as seen by the caller.
|
||
On the pdp, the first "output" reg is the only register thus used.
|
||
|
||
maybe ac0 ? - as option someday! */
|
||
|
||
#define FUNCTION_VALUE_REGNO_P(N) (((N) == 0) || (TARGET_AC0 && (N) == 8))
|
||
|
||
/* 1 if N is a possible register number for function argument passing.
|
||
- not used on pdp */
|
||
|
||
#define FUNCTION_ARG_REGNO_P(N) 0
|
||
|
||
/* Define a data type for recording info about an argument list
|
||
during the scan of that argument list. This data type should
|
||
hold all necessary information about the function itself
|
||
and about the args processed so far, enough to enable macros
|
||
such as FUNCTION_ARG to determine where the next arg should go.
|
||
|
||
*/
|
||
|
||
#define CUMULATIVE_ARGS int
|
||
|
||
/* Initialize a variable CUM of type CUMULATIVE_ARGS
|
||
for a call to a function whose data type is FNTYPE.
|
||
For a library call, FNTYPE is 0.
|
||
|
||
...., the offset normally starts at 0, but starts at 1 word
|
||
when the function gets a structure-value-address as an
|
||
invisible first argument. */
|
||
|
||
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
|
||
((CUM) = 0)
|
||
|
||
/* Update the data in CUM to advance over an argument
|
||
of mode MODE and data type TYPE.
|
||
(TYPE is null for libcalls where that information may not be available.)
|
||
|
||
*/
|
||
|
||
|
||
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
|
||
((CUM) += ((MODE) != BLKmode \
|
||
? (GET_MODE_SIZE (MODE)) \
|
||
: (int_size_in_bytes (TYPE))))
|
||
|
||
/* Determine where to put an argument to a function.
|
||
Value is zero to push the argument on the stack,
|
||
or a hard register in which to store the argument.
|
||
|
||
MODE is the argument's machine mode.
|
||
TYPE is the data type of the argument (as a tree).
|
||
This is null for libcalls where that information may
|
||
not be available.
|
||
CUM is a variable of type CUMULATIVE_ARGS which gives info about
|
||
the preceding args and about the function being called.
|
||
NAMED is nonzero if this argument is a named parameter
|
||
(otherwise it is an extra parameter matching an ellipsis). */
|
||
|
||
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
|
||
|
||
/* Define where a function finds its arguments.
|
||
This would be different from FUNCTION_ARG if we had register windows. */
|
||
/*
|
||
#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
|
||
FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
|
||
*/
|
||
|
||
/* Output assembler code to FILE to increment profiler label # LABELNO
|
||
for profiling a function entry. */
|
||
|
||
#define FUNCTION_PROFILER(FILE, LABELNO) \
|
||
gcc_unreachable ();
|
||
|
||
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
|
||
the stack pointer does not matter. The value is tested only in
|
||
functions that have frame pointers.
|
||
No definition is equivalent to always zero. */
|
||
|
||
extern int may_call_alloca;
|
||
|
||
#define EXIT_IGNORE_STACK 1
|
||
|
||
#define INITIAL_FRAME_POINTER_OFFSET(DEPTH_VAR) \
|
||
{ \
|
||
int offset, regno; \
|
||
offset = get_frame_size(); \
|
||
for (regno = 0; regno < 8; regno++) \
|
||
if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) \
|
||
offset += 2; \
|
||
for (regno = 8; regno < 14; regno++) \
|
||
if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) \
|
||
offset += 8; \
|
||
/* offset -= 2; no fp on stack frame */ \
|
||
(DEPTH_VAR) = offset; \
|
||
}
|
||
|
||
|
||
/* Addressing modes, and classification of registers for them. */
|
||
|
||
#define HAVE_POST_INCREMENT 1
|
||
|
||
#define HAVE_PRE_DECREMENT 1
|
||
|
||
/* Macros to check register numbers against specific register classes. */
|
||
|
||
/* These assume that REGNO is a hard or pseudo reg number.
|
||
They give nonzero only if REGNO is a hard reg of the suitable class
|
||
or a pseudo reg currently allocated to a suitable hard reg.
|
||
Since they use reg_renumber, they are safe only once reg_renumber
|
||
has been allocated, which happens in local-alloc.c. */
|
||
|
||
#define REGNO_OK_FOR_INDEX_P(REGNO) \
|
||
((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
|
||
#define REGNO_OK_FOR_BASE_P(REGNO) \
|
||
((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
|
||
|
||
/* Now macros that check whether X is a register and also,
|
||
strictly, whether it is in a specified class.
|
||
*/
|
||
|
||
|
||
|
||
/* Maximum number of registers that can appear in a valid memory address. */
|
||
|
||
#define MAX_REGS_PER_ADDRESS 1
|
||
|
||
/* Nonzero if the constant value X is a legitimate general operand.
|
||
It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
|
||
|
||
#define LEGITIMATE_CONSTANT_P(X) \
|
||
(GET_CODE (X) != CONST_DOUBLE || legitimate_const_double_p (X))
|
||
|
||
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
|
||
and check its validity for a certain class.
|
||
We have two alternate definitions for each of them.
|
||
The usual definition accepts all pseudo regs; the other rejects
|
||
them unless they have been allocated suitable hard regs.
|
||
The symbol REG_OK_STRICT causes the latter definition to be used.
|
||
|
||
Most source files want to accept pseudo regs in the hope that
|
||
they will get allocated to the class that the insn wants them to be in.
|
||
Source files for reload pass need to be strict.
|
||
After reload, it makes no difference, since pseudo regs have
|
||
been eliminated by then. */
|
||
|
||
#ifndef REG_OK_STRICT
|
||
|
||
/* Nonzero if X is a hard reg that can be used as an index
|
||
or if it is a pseudo reg. */
|
||
#define REG_OK_FOR_INDEX_P(X) (1)
|
||
/* Nonzero if X is a hard reg that can be used as a base reg
|
||
or if it is a pseudo reg. */
|
||
#define REG_OK_FOR_BASE_P(X) (1)
|
||
|
||
#else
|
||
|
||
/* Nonzero if X is a hard reg that can be used as an index. */
|
||
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
|
||
/* Nonzero if X is a hard reg that can be used as a base reg. */
|
||
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
|
||
|
||
#endif
|
||
|
||
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
|
||
that is a valid memory address for an instruction.
|
||
The MODE argument is the machine mode for the MEM expression
|
||
that wants to use this address.
|
||
|
||
*/
|
||
|
||
#define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
|
||
{ \
|
||
rtx xfoob; \
|
||
\
|
||
/* accept (R0) */ \
|
||
if (GET_CODE (operand) == REG \
|
||
&& REG_OK_FOR_BASE_P(operand)) \
|
||
goto ADDR; \
|
||
\
|
||
/* accept @#address */ \
|
||
if (CONSTANT_ADDRESS_P (operand)) \
|
||
goto ADDR; \
|
||
\
|
||
/* accept X(R0) */ \
|
||
if (GET_CODE (operand) == PLUS \
|
||
&& GET_CODE (XEXP (operand, 0)) == REG \
|
||
&& REG_OK_FOR_BASE_P (XEXP (operand, 0)) \
|
||
&& CONSTANT_ADDRESS_P (XEXP (operand, 1))) \
|
||
goto ADDR; \
|
||
\
|
||
/* accept -(R0) */ \
|
||
if (GET_CODE (operand) == PRE_DEC \
|
||
&& GET_CODE (XEXP (operand, 0)) == REG \
|
||
&& REG_OK_FOR_BASE_P (XEXP (operand, 0))) \
|
||
goto ADDR; \
|
||
\
|
||
/* accept (R0)+ */ \
|
||
if (GET_CODE (operand) == POST_INC \
|
||
&& GET_CODE (XEXP (operand, 0)) == REG \
|
||
&& REG_OK_FOR_BASE_P (XEXP (operand, 0))) \
|
||
goto ADDR; \
|
||
\
|
||
/* accept -(SP) -- which uses PRE_MODIFY for byte mode */ \
|
||
if (GET_CODE (operand) == PRE_MODIFY \
|
||
&& GET_CODE (XEXP (operand, 0)) == REG \
|
||
&& REGNO (XEXP (operand, 0)) == 6 \
|
||
&& GET_CODE ((xfoob = XEXP (operand, 1))) == PLUS \
|
||
&& GET_CODE (XEXP (xfoob, 0)) == REG \
|
||
&& REGNO (XEXP (xfoob, 0)) == 6 \
|
||
&& CONSTANT_P (XEXP (xfoob, 1)) \
|
||
&& INTVAL (XEXP (xfoob,1)) == -2) \
|
||
goto ADDR; \
|
||
\
|
||
/* accept (SP)+ -- which uses POST_MODIFY for byte mode */ \
|
||
if (GET_CODE (operand) == POST_MODIFY \
|
||
&& GET_CODE (XEXP (operand, 0)) == REG \
|
||
&& REGNO (XEXP (operand, 0)) == 6 \
|
||
&& GET_CODE ((xfoob = XEXP (operand, 1))) == PLUS \
|
||
&& GET_CODE (XEXP (xfoob, 0)) == REG \
|
||
&& REGNO (XEXP (xfoob, 0)) == 6 \
|
||
&& CONSTANT_P (XEXP (xfoob, 1)) \
|
||
&& INTVAL (XEXP (xfoob,1)) == 2) \
|
||
goto ADDR; \
|
||
\
|
||
\
|
||
/* handle another level of indirection ! */ \
|
||
if (GET_CODE(operand) != MEM) \
|
||
goto fail; \
|
||
\
|
||
xfoob = XEXP (operand, 0); \
|
||
\
|
||
/* (MEM:xx (MEM:xx ())) is not valid for SI, DI and currently */ \
|
||
/* also forbidden for float, because we have to handle this */ \
|
||
/* in output_move_double and/or output_move_quad() - we could */ \
|
||
/* do it, but currently it's not worth it!!! */ \
|
||
/* now that DFmode cannot go into CPU register file, */ \
|
||
/* maybe I should allow float ... */ \
|
||
/* but then I have to handle memory-to-memory moves in movdf ?? */ \
|
||
\
|
||
if (GET_MODE_BITSIZE(mode) > 16) \
|
||
goto fail; \
|
||
\
|
||
/* accept @(R0) - which is @0(R0) */ \
|
||
if (GET_CODE (xfoob) == REG \
|
||
&& REG_OK_FOR_BASE_P(xfoob)) \
|
||
goto ADDR; \
|
||
\
|
||
/* accept @address */ \
|
||
if (CONSTANT_ADDRESS_P (xfoob)) \
|
||
goto ADDR; \
|
||
\
|
||
/* accept @X(R0) */ \
|
||
if (GET_CODE (xfoob) == PLUS \
|
||
&& GET_CODE (XEXP (xfoob, 0)) == REG \
|
||
&& REG_OK_FOR_BASE_P (XEXP (xfoob, 0)) \
|
||
&& CONSTANT_ADDRESS_P (XEXP (xfoob, 1))) \
|
||
goto ADDR; \
|
||
\
|
||
/* accept @-(R0) */ \
|
||
if (GET_CODE (xfoob) == PRE_DEC \
|
||
&& GET_CODE (XEXP (xfoob, 0)) == REG \
|
||
&& REG_OK_FOR_BASE_P (XEXP (xfoob, 0))) \
|
||
goto ADDR; \
|
||
\
|
||
/* accept @(R0)+ */ \
|
||
if (GET_CODE (xfoob) == POST_INC \
|
||
&& GET_CODE (XEXP (xfoob, 0)) == REG \
|
||
&& REG_OK_FOR_BASE_P (XEXP (xfoob, 0))) \
|
||
goto ADDR; \
|
||
\
|
||
/* anything else is invalid */ \
|
||
fail: ; \
|
||
}
|
||
|
||
|
||
/* Specify the machine mode that this machine uses
|
||
for the index in the tablejump instruction. */
|
||
#define CASE_VECTOR_MODE HImode
|
||
|
||
/* Define this if a raw index is all that is needed for a
|
||
`tablejump' insn. */
|
||
#define CASE_TAKES_INDEX_RAW
|
||
|
||
/* Define this as 1 if `char' should by default be signed; else as 0. */
|
||
#define DEFAULT_SIGNED_CHAR 1
|
||
|
||
/* Max number of bytes we can move from memory to memory
|
||
in one reasonably fast instruction.
|
||
*/
|
||
|
||
#define MOVE_MAX 2
|
||
|
||
/* Nonzero if access to memory by byte is slow and undesirable. -
|
||
*/
|
||
#define SLOW_BYTE_ACCESS 0
|
||
|
||
/* Do not break .stabs pseudos into continuations. */
|
||
#define DBX_CONTIN_LENGTH 0
|
||
|
||
/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
|
||
is done just by pretending it is already truncated. */
|
||
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
|
||
|
||
/* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE,
|
||
return the mode to be used for the comparison. For floating-point, CCFPmode
|
||
should be used. */
|
||
|
||
#define SELECT_CC_MODE(OP,X,Y) \
|
||
(GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode)
|
||
|
||
/* Specify the machine mode that pointers have.
|
||
After generation of rtl, the compiler makes no further distinction
|
||
between pointers and any other objects of this machine mode. */
|
||
#define Pmode HImode
|
||
|
||
/* A function address in a call instruction
|
||
is a word address (for indexing purposes)
|
||
so give the MEM rtx a word's mode. */
|
||
#define FUNCTION_MODE HImode
|
||
|
||
/* Define this if addresses of constant functions
|
||
shouldn't be put through pseudo regs where they can be cse'd.
|
||
Desirable on machines where ordinary constants are expensive
|
||
but a CALL with constant address is cheap. */
|
||
/* #define NO_FUNCTION_CSE */
|
||
|
||
|
||
/* cost of moving one register class to another */
|
||
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
|
||
register_move_cost (CLASS1, CLASS2)
|
||
|
||
/* Tell emit-rtl.c how to initialize special values on a per-function base. */
|
||
extern int optimize;
|
||
extern struct rtx_def *cc0_reg_rtx;
|
||
|
||
#define CC_STATUS_MDEP rtx
|
||
|
||
#define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
|
||
|
||
/* Tell final.c how to eliminate redundant test instructions. */
|
||
|
||
/* Here we define machine-dependent flags and fields in cc_status
|
||
(see `conditions.h'). */
|
||
|
||
#define CC_IN_FPU 04000
|
||
|
||
/* Do UPDATE_CC if EXP is a set, used in
|
||
NOTICE_UPDATE_CC
|
||
|
||
floats only do compare correctly, else nullify ...
|
||
|
||
get cc0 out soon ...
|
||
*/
|
||
|
||
/* Store in cc_status the expressions
|
||
that the condition codes will describe
|
||
after execution of an instruction whose pattern is EXP.
|
||
Do not alter them if the instruction would not alter the cc's. */
|
||
|
||
#define NOTICE_UPDATE_CC(EXP, INSN) \
|
||
{ if (GET_CODE (EXP) == SET) \
|
||
{ \
|
||
notice_update_cc_on_set(EXP, INSN); \
|
||
} \
|
||
else if (GET_CODE (EXP) == PARALLEL \
|
||
&& GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
|
||
{ \
|
||
notice_update_cc_on_set(XVECEXP (EXP, 0, 0), INSN); \
|
||
} \
|
||
else if (GET_CODE (EXP) == CALL) \
|
||
{ /* all bets are off */ CC_STATUS_INIT; } \
|
||
if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
|
||
&& cc_status.value2 \
|
||
&& reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
|
||
{ \
|
||
printf ("here!\n"); \
|
||
cc_status.value2 = 0; \
|
||
} \
|
||
}
|
||
|
||
/* Control the assembler format that we output. */
|
||
|
||
/* Output to assembler file text saying following lines
|
||
may contain character constants, extra white space, comments, etc. */
|
||
|
||
#define ASM_APP_ON ""
|
||
|
||
/* Output to assembler file text saying following lines
|
||
no longer contain unusual constructs. */
|
||
|
||
#define ASM_APP_OFF ""
|
||
|
||
/* Output before read-only data. */
|
||
|
||
#define TEXT_SECTION_ASM_OP "\t.text\n"
|
||
|
||
/* Output before writable data. */
|
||
|
||
#define DATA_SECTION_ASM_OP "\t.data\n"
|
||
|
||
/* How to refer to registers in assembler output.
|
||
This sequence is indexed by compiler's hard-register-number (see above). */
|
||
|
||
#define REGISTER_NAMES \
|
||
{"r0", "r1", "r2", "r3", "r4", "r5", "sp", "pc", \
|
||
"ac0", "ac1", "ac2", "ac3", "ac4", "ac5" }
|
||
|
||
/* Globalizing directive for a label. */
|
||
#define GLOBAL_ASM_OP "\t.globl "
|
||
|
||
/* The prefix to add to user-visible assembler symbols. */
|
||
|
||
#define USER_LABEL_PREFIX "_"
|
||
|
||
/* This is how to store into the string LABEL
|
||
the symbol_ref name of an internal numbered label where
|
||
PREFIX is the class of label and NUM is the number within the class.
|
||
This is suitable for output with `assemble_name'. */
|
||
|
||
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
|
||
sprintf (LABEL, "*%s_%lu", PREFIX, (unsigned long)(NUM))
|
||
|
||
#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
|
||
output_ascii (FILE, P, SIZE)
|
||
|
||
/* This is how to output an element of a case-vector that is absolute. */
|
||
|
||
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
|
||
fprintf (FILE, "\t%sL_%d\n", TARGET_UNIX_ASM ? "" : ".word ", VALUE)
|
||
|
||
/* This is how to output an element of a case-vector that is relative.
|
||
Don't define this if it is not supported. */
|
||
|
||
/* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */
|
||
|
||
/* This is how to output an assembler line
|
||
that says to advance the location counter
|
||
to a multiple of 2**LOG bytes.
|
||
|
||
who needs this????
|
||
*/
|
||
|
||
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
|
||
switch (LOG) \
|
||
{ \
|
||
case 0: \
|
||
break; \
|
||
case 1: \
|
||
fprintf (FILE, "\t.even\n"); \
|
||
break; \
|
||
default: \
|
||
gcc_unreachable (); \
|
||
}
|
||
|
||
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
|
||
fprintf (FILE, "\t.=.+ %#ho\n", (unsigned short)(SIZE))
|
||
|
||
/* This says how to output an assembler line
|
||
to define a global common symbol. */
|
||
|
||
#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
|
||
( fprintf ((FILE), ".globl "), \
|
||
assemble_name ((FILE), (NAME)), \
|
||
fprintf ((FILE), "\n"), \
|
||
assemble_name ((FILE), (NAME)), \
|
||
fprintf ((FILE), ": .=.+ %#ho\n", (unsigned short)(ROUNDED)) \
|
||
)
|
||
|
||
/* This says how to output an assembler line
|
||
to define a local common symbol. */
|
||
|
||
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
|
||
( assemble_name ((FILE), (NAME)), \
|
||
fprintf ((FILE), ":\t.=.+ %#ho\n", (unsigned short)(ROUNDED)))
|
||
|
||
/* Print operand X (an rtx) in assembler syntax to file FILE.
|
||
CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
|
||
For `%' followed by punctuation, CODE is the punctuation and X is null.
|
||
|
||
*/
|
||
|
||
|
||
#define PRINT_OPERAND(FILE, X, CODE) \
|
||
{ if (CODE == '#') fprintf (FILE, "#"); \
|
||
else if (GET_CODE (X) == REG) \
|
||
fprintf (FILE, "%s", reg_names[REGNO (X)]); \
|
||
else if (GET_CODE (X) == MEM) \
|
||
output_address (XEXP (X, 0)); \
|
||
else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != SImode) \
|
||
{ REAL_VALUE_TYPE r; \
|
||
long sval[2]; \
|
||
REAL_VALUE_FROM_CONST_DOUBLE (r, X); \
|
||
REAL_VALUE_TO_TARGET_DOUBLE (r, sval); \
|
||
fprintf (FILE, "$%#lo", sval[0] >> 16); } \
|
||
else { putc ('$', FILE); output_addr_const_pdp11 (FILE, X); }}
|
||
|
||
/* Print a memory address as an operand to reference that memory location. */
|
||
|
||
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
|
||
print_operand_address (FILE, ADDR)
|
||
|
||
#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
|
||
( \
|
||
fprintf (FILE, "\tmov %s, -(sp)\n", reg_names[REGNO]) \
|
||
)
|
||
|
||
#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
|
||
( \
|
||
fprintf (FILE, "\tmov (sp)+, %s\n", reg_names[REGNO]) \
|
||
)
|
||
|
||
#define TRAMPOLINE_SIZE 8
|
||
#define TRAMPOLINE_ALIGNMENT 16
|
||
|
||
/* Some machines may desire to change what optimizations are
|
||
performed for various optimization levels. This macro, if
|
||
defined, is executed once just after the optimization level is
|
||
determined and before the remainder of the command options have
|
||
been parsed. Values set in this macro are used as the default
|
||
values for the other command line options.
|
||
|
||
LEVEL is the optimization level specified; 2 if -O2 is
|
||
specified, 1 if -O is specified, and 0 if neither is specified. */
|
||
|
||
#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
|
||
{ \
|
||
flag_finite_math_only = 0; \
|
||
flag_trapping_math = 0; \
|
||
flag_signaling_nans = 0; \
|
||
if (LEVEL >= 3) \
|
||
{ \
|
||
flag_omit_frame_pointer = 1; \
|
||
/* flag_unroll_loops = 1; */ \
|
||
} \
|
||
}
|
||
|
||
/* there is no point in avoiding branches on a pdp,
|
||
since branches are really cheap - I just want to find out
|
||
how much difference the BRANCH_COST macro makes in code */
|
||
#define BRANCH_COST(speed_p, predictable_p) (TARGET_BRANCH_CHEAP ? 0 : 1)
|
||
|
||
|
||
#define COMPARE_FLAG_MODE HImode
|