172 lines
6.0 KiB
Markdown
172 lines
6.0 KiB
Markdown
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;; Constraint definitions for IA-32 and x86-64.
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;; Copyright (C) 2006, 2007 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3. If not see
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;; <http://www.gnu.org/licenses/>.
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;;; Unused letters:
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;;; B H T W
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;;; h jk vw z
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;; Integer register constraints.
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;; It is not necessary to define 'r' here.
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(define_register_constraint "R" "LEGACY_REGS"
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"Legacy register---the eight integer registers available on all
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i386 processors (@code{a}, @code{b}, @code{c}, @code{d},
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@code{si}, @code{di}, @code{bp}, @code{sp}).")
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(define_register_constraint "q" "TARGET_64BIT ? GENERAL_REGS : Q_REGS"
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"Any register accessible as @code{@var{r}l}. In 32-bit mode, @code{a},
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@code{b}, @code{c}, and @code{d}; in 64-bit mode, any integer register.")
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(define_register_constraint "Q" "Q_REGS"
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"Any register accessible as @code{@var{r}h}: @code{a}, @code{b},
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@code{c}, and @code{d}.")
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(define_register_constraint "l" "INDEX_REGS"
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"@internal Any register that can be used as the index in a base+index
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memory access: that is, any general register except the stack pointer.")
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(define_register_constraint "a" "AREG"
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"The @code{a} register.")
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(define_register_constraint "b" "BREG"
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"The @code{b} register.")
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(define_register_constraint "c" "CREG"
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"The @code{c} register.")
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(define_register_constraint "d" "DREG"
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"The @code{d} register.")
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(define_register_constraint "S" "SIREG"
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"The @code{si} register.")
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(define_register_constraint "D" "DIREG"
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"The @code{di} register.")
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(define_register_constraint "A" "AD_REGS"
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"The @code{a} and @code{d} registers, as a pair (for instructions
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that return half the result in one and half in the other).")
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(define_register_constraint "U" "CLOBBERED_REGS"
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"The call-clobbered integer registers.")
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;; Floating-point register constraints.
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(define_register_constraint "f"
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"TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FLOAT_REGS : NO_REGS"
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"Any 80387 floating-point (stack) register.")
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(define_register_constraint "t"
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"TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_TOP_REG : NO_REGS"
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"Top of 80387 floating-point stack (@code{%st(0)}).")
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(define_register_constraint "u"
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"TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_SECOND_REG : NO_REGS"
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"Second from top of 80387 floating-point stack (@code{%st(1)}).")
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;; Vector registers (also used for plain floating point nowadays).
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(define_register_constraint "y" "TARGET_MMX ? MMX_REGS : NO_REGS"
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"Any MMX register.")
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(define_register_constraint "x" "TARGET_SSE ? SSE_REGS : NO_REGS"
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"Any SSE register.")
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;; We use the Y prefix to denote any number of conditional register sets:
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;; z First SSE register.
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;; 2 SSE2 enabled
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;; i SSE2 inter-unit moves enabled
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;; m MMX inter-unit moves enabled
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(define_register_constraint "Yz" "TARGET_SSE ? SSE_FIRST_REG : NO_REGS"
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"First SSE register (@code{%xmm0}).")
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(define_register_constraint "Y2" "TARGET_SSE2 ? SSE_REGS : NO_REGS"
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"@internal Any SSE register, when SSE2 is enabled.")
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(define_register_constraint "Yi"
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"TARGET_SSE2 && TARGET_INTER_UNIT_MOVES ? SSE_REGS : NO_REGS"
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"@internal Any SSE register, when SSE2 and inter-unit moves are enabled.")
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(define_register_constraint "Ym"
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"TARGET_MMX && TARGET_INTER_UNIT_MOVES ? MMX_REGS : NO_REGS"
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"@internal Any MMX register, when inter-unit moves are enabled.")
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;; Integer constant constraints.
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(define_constraint "I"
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"Integer constant in the range 0 @dots{} 31, for 32-bit shifts."
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, 0, 31)")))
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(define_constraint "J"
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"Integer constant in the range 0 @dots{} 63, for 64-bit shifts."
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, 0, 63)")))
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(define_constraint "K"
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"Signed 8-bit integer constant."
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, -128, 127)")))
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(define_constraint "L"
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"@code{0xFF} or @code{0xFFFF}, for andsi as a zero-extending move."
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(and (match_code "const_int")
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(match_test "ival == 0xFF || ival == 0xFFFF")))
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(define_constraint "M"
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"0, 1, 2, or 3 (shifts for the @code{lea} instruction)."
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, 0, 3)")))
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(define_constraint "N"
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"Unsigned 8-bit integer constant (for @code{in} and @code{out}
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instructions)."
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, 0, 255)")))
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(define_constraint "O"
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"@internal Integer constant in the range 0 @dots{} 127, for 128-bit shifts."
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, 0, 127)")))
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;; Floating-point constant constraints.
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;; We allow constants even if TARGET_80387 isn't set, because the
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;; stack register converter may need to load 0.0 into the function
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;; value register (top of stack).
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(define_constraint "G"
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"Standard 80387 floating point constant."
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(and (match_code "const_double")
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(match_test "standard_80387_constant_p (op)")))
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;; This can theoretically be any mode's CONST0_RTX.
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(define_constraint "C"
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"Standard SSE floating point constant."
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(match_test "standard_sse_constant_p (op)"))
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;; Constant-or-symbol-reference constraints.
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(define_constraint "e"
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"32-bit signed integer constant, or a symbolic reference known
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to fit that range (for immediate operands in sign-extending x86-64
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instructions)."
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(match_operand 0 "x86_64_immediate_operand"))
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(define_constraint "Z"
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"32-bit unsigned integer constant, or a symbolic reference known
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to fit that range (for immediate operands in zero-extending x86-64
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instructions)."
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(match_operand 0 "x86_64_zext_immediate_operand"))
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