From aef40ff65192f61fec52a435eeec2b87b36e4114 Mon Sep 17 00:00:00 2001 From: Thomas Preud'homme Date: Tue, 25 Jan 2011 17:25:38 +0100 Subject: [PATCH] [commtech] Fix cache line size Cache line size in current processors (at least the one used for tests: cerclon) is 64 bytes, not 128. Thus modifying the declaration in commtech.h --- communication_techniques/include/commtech.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/communication_techniques/include/commtech.h b/communication_techniques/include/commtech.h index 07d93b6..cf6b080 100644 --- a/communication_techniques/include/commtech.h +++ b/communication_techniques/include/commtech.h @@ -1,7 +1,7 @@ #ifndef _COMMTECH_H_ #define _COMMTECH_H_ 1 -#define CACHE_LINE_SIZE 128 +#define CACHE_LINE_SIZE 64 #define BUF_SIZE CACHE_LINE_SIZE #define likely(x) __builtin_expect(!!(x), 1)